[PATCH] D54340: AMDGPU: Fix various issues around the VirtReg2Value mapping

Nicolai Hähnle via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 16 04:13:32 PST 2018


nhaehnle marked 2 inline comments as done.
nhaehnle added a comment.

In https://reviews.llvm.org/D54340#1293411, @arsenm wrote:

> Is there code for the lazy map that should be cleaned up now?


Not that I'm aware of. The lazy mapping is done by `FunctionLoweringInfo::getValueFromVirtualReg`, which this change modifies to fix the problem with composite values.



================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:9305
       const RegisterSDNode *R = nullptr;
       if (N->getOpcode() == ISD::Register) {
         R = dyn_cast<RegisterSDNode>(N);
----------------
alex-t wrote:
> Removing the line "case ISD::Register", why don't you remove the related lines either?
Good point, cleaned this up a bit more.


Repository:
  rL LLVM

https://reviews.llvm.org/D54340





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