[llvm] r347010 - [X86] Update a couple comments to remove a mention of a sign extending that no longer happens. NFC

[Craig Topper via llvm-commits]

Author: ctopper
Date: Thu Nov 15 17:16:51 2018
New Revision: 347010

URL: http://llvm.org/viewvc/llvm-project?rev=347010&view=rev
Log:
[X86] Update a couple comments to remove a mention of a sign extending that no longer happens. NFC

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=347010&r1=347009&r2=347010&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Nov 15 17:16:51 2018
@@ -23367,7 +23367,7 @@ static SDValue LowerMUL(SDValue Op, cons
            "Pre-AVX2 support only supports v16i8 multiplication");
     MVT ExVT = MVT::v8i16;
 
-    // Extract the lo parts and sign extend to i16
+    // Extract the lo parts to any extend to i16
     // We're going to mask off the low byte of each result element of the
     // pmullw, so it doesn't matter what's in the high byte of each 16-bit
     // element.
@@ -23378,11 +23378,11 @@ static SDValue LowerMUL(SDValue Op, cons
     ALo = DAG.getBitcast(ExVT, ALo);
     BLo = DAG.getBitcast(ExVT, BLo);
 
-    // Extract the hi parts and sign extend to i16
+    // Extract the hi parts to any extend to i16
     // We're going to mask off the low byte of each result element of the
     // pmullw, so it doesn't matter what's in the high byte of each 16-bit
     // element.
-    const int HiShufMask[] = {8,  -1, 9,  -1, 10, -1, 11, -1,
+    const int HiShufMask[] = { 8, -1,  9, -1, 10, -1, 11, -1,
                               12, -1, 13, -1, 14, -1, 15, -1};
     SDValue AHi = DAG.getVectorShuffle(VT, dl, A, A, HiShufMask);
     SDValue BHi = DAG.getVectorShuffle(VT, dl, B, B, HiShufMask);