[PATCH] D54267: [X86][SSE] Add lowerVectorShuffleAsByteRotateAndPermute (PR39387)

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 12 10:25:27 PST 2018


RKSimon marked 2 inline comments as done.
RKSimon added inline comments.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:10496
+  if (!(0 <= Range1.first && Range1.second < NumElts &&
+        Range1.first <= Range1.second) ||
+      !(0 <= Range2.first && Range2.second < NumElts &&
----------------
craig.topper wrote:
> craig.topper wrote:
> > If the min/max is inside the lane, isn't Range1.first always less than or equal to Range1.second? And isn't Range1.first always less than or equal to Range1.second unless the input is unused by the shuffle? Which would mean the input is undef?
> I dont' think i saw an answer for this
Yes, I can drop the Range1.first <= Range1.second condition


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:10170
+  unsigned EltSize = VT.getScalarSizeInBits();
+  if (ImmBlends && EltSize == 8 && !canWidenShuffleElements(BlendMask))
+    return SDValue();
----------------
craig.topper wrote:
> If the elements could be widened wouldn't they have already been widened in lowerVectorShuffle?
You can have cases where the blend is wider than the permute (PBLENDD + PSHUFB etc.)


Repository:
  rL LLVM

https://reviews.llvm.org/D54267





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