[PATCH] D54351: [AMDGPU] combine extractelement into several selects

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:8057-8058
 
+  // EXTRACT_VECTOR_ELT (<n x e>, var-idx) => n x select (e, const-idx)
+  // This elminates non-constant index and subsequent movrel or scratch access.
+  // Sub-dword vectors of size 2 dword or less have better implementation.
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arsenm wrote:
> Is this a combine instead of custom lowering to handle illegal typed vectors?
This is to allow further combining of selects. Ideally I thought about an IR pass, though amdgpu codegen prepare works too early to catch extract vectors created by promote alloca. A DAG combine works just fine.


https://reviews.llvm.org/D54351