[llvm] r346498 - [x86] try to form broadcast before widening shuffle elements
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 9 06:54:58 PST 2018
Author: spatel
Date: Fri Nov 9 06:54:58 2018
New Revision: 346498
URL: http://llvm.org/viewvc/llvm-project?rev=346498&view=rev
Log:
[x86] try to form broadcast before widening shuffle elements
I noticed that we weren't generating broadcasts as much I thought we would with
D54271, and this is part of the problem.
Widening the shuffle elements means adding bitcasts and hiding the relationship
between a splatted scalar and the vector. If we can form a broadcast, do that
before going through the rest of the shuffle lowering because broadcasts should
be cheap and can often be load-folded.
Differential Revision: https://reviews.llvm.org/D54280
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/haddsub-undef.ll
llvm/trunk/test/CodeGen/X86/insert-into-constant-vector.ll
llvm/trunk/test/CodeGen/X86/shuffle-of-splat-multiuses.ll
llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v4.ll
llvm/trunk/test/CodeGen/X86/vector-shuffle-combining.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=346498&r1=346497&r2=346498&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Nov 9 06:54:58 2018
@@ -15627,6 +15627,14 @@ static SDValue lowerVectorShuffle(SDValu
SmallVector<int, 16> WidenedMask;
if (VT.getScalarSizeInBits() < 64 && !Is1BitVector &&
canWidenShuffleElements(ZeroableMask, WidenedMask)) {
+ // Shuffle mask widening should not interfere with a broadcast opportunity
+ // by obfuscating the operands with bitcasts.
+ // TODO: Avoid lowering directly from this top-level function: make this
+ // a query (canLowerAsBroadcast) and defer lowering to the type-based calls.
+ if (SDValue Broadcast =
+ lowerVectorShuffleAsBroadcast(DL, VT, V1, V2, Mask, Subtarget, DAG))
+ return Broadcast;
+
MVT NewEltVT = VT.isFloatingPoint()
? MVT::getFloatingPointVT(VT.getScalarSizeInBits() * 2)
: MVT::getIntegerVT(VT.getScalarSizeInBits() * 2);
Modified: llvm/trunk/test/CodeGen/X86/haddsub-undef.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/haddsub-undef.ll?rev=346498&r1=346497&r2=346498&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/haddsub-undef.ll (original)
+++ llvm/trunk/test/CodeGen/X86/haddsub-undef.ll Fri Nov 9 06:54:58 2018
@@ -696,7 +696,7 @@ define <4 x float> @add_ps_007_2(<4 x fl
;
; AVX2-SLOW-LABEL: add_ps_007_2:
; AVX2-SLOW: # %bb.0:
-; AVX2-SLOW-NEXT: vmovddup {{.*#+}} xmm1 = xmm0[0,0]
+; AVX2-SLOW-NEXT: vbroadcastss %xmm0, %xmm1
; AVX2-SLOW-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,1,3]
; AVX2-SLOW-NEXT: vaddps %xmm0, %xmm1, %xmm0
; AVX2-SLOW-NEXT: retq
@@ -826,7 +826,7 @@ define <4 x float> @add_ps_018(<4 x floa
;
; AVX2-SLOW-LABEL: add_ps_018:
; AVX2-SLOW: # %bb.0:
-; AVX2-SLOW-NEXT: vmovddup {{.*#+}} xmm1 = xmm0[0,0]
+; AVX2-SLOW-NEXT: vbroadcastss %xmm0, %xmm1
; AVX2-SLOW-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,1,3]
; AVX2-SLOW-NEXT: vaddps %xmm0, %xmm1, %xmm0
; AVX2-SLOW-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,2,3]
Modified: llvm/trunk/test/CodeGen/X86/insert-into-constant-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/insert-into-constant-vector.ll?rev=346498&r1=346497&r2=346498&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/insert-into-constant-vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/insert-into-constant-vector.ll Fri Nov 9 06:54:58 2018
@@ -352,13 +352,11 @@ define <8 x float> @elt6_v8f32(float %x)
; X64SSE4-NEXT: movaps {{.*#+}} xmm0 = [4.2E+1,1.0E+0,2.0E+0,3.0E+0]
; X64SSE4-NEXT: retq
;
-; X32AVX1-LABEL: elt6_v8f32:
-; X32AVX1: # %bb.0:
-; X32AVX1-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; X32AVX1-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
-; X32AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
-; X32AVX1-NEXT: vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5],ymm0[6],mem[7]
-; X32AVX1-NEXT: retl
+; X32AVX-LABEL: elt6_v8f32:
+; X32AVX: # %bb.0:
+; X32AVX-NEXT: vbroadcastss {{[0-9]+}}(%esp), %ymm0
+; X32AVX-NEXT: vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5],ymm0[6],mem[7]
+; X32AVX-NEXT: retl
;
; X64AVX1-LABEL: elt6_v8f32:
; X64AVX1: # %bb.0:
@@ -367,29 +365,15 @@ define <8 x float> @elt6_v8f32(float %x)
; X64AVX1-NEXT: vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5],ymm0[6],mem[7]
; X64AVX1-NEXT: retq
;
-; X32AVX2-LABEL: elt6_v8f32:
-; X32AVX2: # %bb.0:
-; X32AVX2-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; X32AVX2-NEXT: vbroadcastsd %xmm0, %ymm0
-; X32AVX2-NEXT: vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5],ymm0[6],mem[7]
-; X32AVX2-NEXT: retl
-;
; X64AVX2-LABEL: elt6_v8f32:
; X64AVX2: # %bb.0:
-; X64AVX2-NEXT: vbroadcastsd %xmm0, %ymm0
+; X64AVX2-NEXT: vbroadcastss %xmm0, %ymm0
; X64AVX2-NEXT: vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5],ymm0[6],mem[7]
; X64AVX2-NEXT: retq
;
-; X32AVX512F-LABEL: elt6_v8f32:
-; X32AVX512F: # %bb.0:
-; X32AVX512F-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; X32AVX512F-NEXT: vbroadcastsd %xmm0, %ymm0
-; X32AVX512F-NEXT: vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5],ymm0[6],mem[7]
-; X32AVX512F-NEXT: retl
-;
; X64AVX512F-LABEL: elt6_v8f32:
; X64AVX512F: # %bb.0:
-; X64AVX512F-NEXT: vbroadcastsd %xmm0, %ymm0
+; X64AVX512F-NEXT: vbroadcastss %xmm0, %ymm0
; X64AVX512F-NEXT: vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5],ymm0[6],mem[7]
; X64AVX512F-NEXT: retq
%ins = insertelement <8 x float> <float 42.0, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0>, float %x, i32 6
Modified: llvm/trunk/test/CodeGen/X86/shuffle-of-splat-multiuses.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shuffle-of-splat-multiuses.ll?rev=346498&r1=346497&r2=346498&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shuffle-of-splat-multiuses.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shuffle-of-splat-multiuses.ll Fri Nov 9 06:54:58 2018
@@ -94,10 +94,8 @@ define <4 x i32> @undef_splatmask4(<4 x
define <4 x i32> @undef_splatmask5(<4 x i32> %v, <4 x i32>* %p) nounwind {
; AVX2-LABEL: undef_splatmask5:
; AVX2: # %bb.0:
-; AVX2-NEXT: vpbroadcastd %xmm0, %xmm1
-; AVX2-NEXT: vpbroadcastq %xmm0, %xmm0
-; AVX2-NEXT: vmovdqa %xmm0, (%rdi)
-; AVX2-NEXT: vmovdqa %xmm1, %xmm0
+; AVX2-NEXT: vbroadcastss %xmm0, %xmm0
+; AVX2-NEXT: vmovaps %xmm0, (%rdi)
; AVX2-NEXT: retq
%res = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 0, i32 undef>
%res1 = shufflevector <4 x i32> %res, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 3>
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v4.ll?rev=346498&r1=346497&r2=346498&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v4.ll Fri Nov 9 06:54:58 2018
@@ -403,9 +403,9 @@ define <4 x i32> @shuffle_v4i32_0142(<4
;
; AVX2OR512VL-LABEL: shuffle_v4i32_0142:
; AVX2OR512VL: # %bb.0:
-; AVX2OR512VL-NEXT: vpbroadcastq %xmm1, %xmm1
-; AVX2OR512VL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
-; AVX2OR512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
+; AVX2OR512VL-NEXT: vbroadcastss %xmm1, %xmm1
+; AVX2OR512VL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,2,2]
+; AVX2OR512VL-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
; AVX2OR512VL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
ret <4 x i32> %shuffle
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-combining.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-combining.ll?rev=346498&r1=346497&r2=346498&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-combining.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-combining.ll Fri Nov 9 06:54:58 2018
@@ -802,7 +802,7 @@ define <4 x i32> @combine_nested_undef_t
;
; AVX2-LABEL: combine_nested_undef_test12:
; AVX2: # %bb.0:
-; AVX2-NEXT: vpbroadcastq %xmm0, %xmm0
+; AVX2-NEXT: vbroadcastss %xmm0, %xmm0
; AVX2-NEXT: retq
%1 = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> <i32 0, i32 0, i32 2, i32 4>
%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 4, i32 0, i32 4>
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