[PATCH] D54121: [FPEnv] Add constrained FCMP intrinsic

[Andy Kaylor via Phabricator via llvm-commits]

andrew.w.kaylor added a comment.

In https://reviews.llvm.org/D54121#1290989, @cameron.mcinally wrote:

>   compareSignalingGreaterEqual(a,b) is equivalent to compareSignalingLessUnordered(b, a)
>


Is it? If a or b is NaN the first one will return false but the second will return true. I was trying to think through the combinations and figure out why IEEE-754 specifies these 22 of the possible 32 combinations and why there are only 12 X86 builtins instead of 16. I think it comes down to eliminating combinations that aren't needed.

Craig pointed out to me that the 16 predicates specified for the fcmp instruction come from a bit matrix of the four possible predicate conditions, even though some of those (like true and false) don't really make any sense. I guess when you're building a processor you need to handle combinations like that in a well-defined manner.


Repository:
  rL LLVM

https://reviews.llvm.org/D54121