[PATCH] D54164: [AMDGPU] Optimize S_CBRANCH_VCC[N]Z -> S_CBRANCH_EXEC[N]Z

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/SIInsertSkips.cpp:390
+
+  if (!ReadsCond && A->registerDefIsDead(AMDGPU::SCC) &&
+      MI.killsRegister(CondReg, TRI))
----------------
rampitec wrote:
> arsenm wrote:
> > Is this registerDefIsDead really what you need? I would expect to need to use LivePhysRegs and check if it's live out (which would also avoid dependence on dead flags)
> This check catches "implicit-def dead $scc", and that is what really produced by the compiler. This is the cheap test comparing to LivePhysRegs use. Any problems with it?
You're supposed to avoid using kill flags now, but this is a dead flag which I'm less sure about.


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Comment at: test/CodeGen/AMDGPU/insert-skip-from-vcc.mir:302
+    S_ENDPGM
+...
----------------
rampitec wrote:
> arsenm wrote:
> > Needs a case with scc live out
> If it is liveout it is then not a dead def at s_and_b64, otherwise IR is malformed. But OK, I have added it.
> JBTW, is there any case where scc can really be a liveout?
It's possible, but I don't think we produce it now. I know I've had patches I never completed where it appeared before when I was trying to enable if conversion


https://reviews.llvm.org/D54164