[PATCH] D52447: [Tablegen/RFC] Introduce Mask to limit generation of inferred register classes

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 5 11:31:31 PST 2018

Previous message: [PATCH] D45213: [COFF][LLD] Add link support for precompiled headers .objs
Next message: [PATCH] D54116: [GlobalISel] Refactor the artifact combiner a bit by using MIPatternMatch
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

arsenm added a comment.

The concept makes sense to me, but I don't see what the meaning of the values is / how you are supposed to compute them for the mask. Is it supposed to be one bit per regunit in the generated registers of the class?


Repository:
  rL LLVM

https://reviews.llvm.org/D52447

Previous message: [PATCH] D45213: [COFF][LLD] Add link support for precompiled headers .objs
Next message: [PATCH] D54116: [GlobalISel] Refactor the artifact combiner a bit by using MIPatternMatch
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list