[PATCH] D54034: [RISCV] Add expansions for floating-point intrinsics

[Luís Marques via Phabricator via llvm-commits]

luismarques created this revision.
luismarques added a reviewer: asb.
Herald added subscribers: llvm-commits, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, mgrang, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar.

A number of intrinsics, such as `llvm.sin.f32`, would result in a failure to select. This patch adds expansions for the relevant selection DAG nodes, as well as exhaustive testing for all f32 and f64 intrinsics.

The codegen for FMA remains a TODO item, pending support for the various RISC-V FMA instruction variants.

The `llvm.minimum.f32.*` and `llvm.maximum.*` tests are commented-out, pending upstream support for target-independent expansion, as discussed in http://lists.llvm.org/pipermail/llvm-dev/2018-November/127408.html.


Repository:
  rL LLVM

https://reviews.llvm.org/D54034

Files:
  lib/Target/RISCV/RISCVISelLowering.cpp
  test/CodeGen/RISCV/double-intrinsics.ll
  test/CodeGen/RISCV/float-intrinsics.ll

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