[PATCH] D53906: [ELF] Allow configuring the TLS layout for an Android executable

[Rui Ueyama via Phabricator via llvm-commits]

ruiu added a comment.

Setting a large alignment to the TLS segment to make room from TP and the TLS segment is an interesting idea. It is tempting, but at the same time it feels a bit too subtle and perhaps fragile. Looks like it is a very indirect way to do what we actually want to do.

If I understand correctly, what we want to do is boiled down to this:

   // A TLS symbol's virtual address is relative to the TLS segment. Add a
   // target-specific adjustment to produce a thread-pointer-relative offset.
   static int64_t getTlsTpOffset() {
     switch (Config->EMachine) {
     case EM_ARM:
     case EM_AARCH64:
       // Variant 1. The thread pointer points to a TCB with a fixed 2-word size,
       // followed by a variable amount of alignment padding, followed by the TLS
      // segment.
  -    return alignTo(Config->Wordsize * 2, Out::TlsPhdr->p_align);
  +    if (Android)
  +      return alignTo(Config->Wordsize * 6, Out::TlsPhdr->p_align);
  +    else
  +      return alignTo(Config->Wordsize * 2, Out::TlsPhdr->p_align);
     case EM_386:
     case EM_X86_64:
       // Variant 2. The TLS segment is located just before the thread pointer.
       return -Out::TlsPhdr->p_memsz;

Is this understanding correct? If so, one radical but simple approach would be to always skip the first 6 words from TP on ARM and AArch64 whether it is Android or not. Obviously that wastes 4 words per a thread, but since thread is not a lightweight data structure, it might be negligible.


Repository:
  rLLD LLVM Linker

https://reviews.llvm.org/D53906