[PATCH] D53816: [TableGen:AsmWriter] Cope with consecutive tied operands.

[Simon Tatham via Phabricator via llvm-commits]

simon_tatham added a comment.

> Can you add some tests for the affected instructions?

I'm afraid the actual case where I ran into this bug is not yet in-tree.

Diffing all the generated `AsmWriter.inc` files before and after this change, it looks as if the only alias that's affected in any in-tree target is `vtrans2x2` in the Hexagon backend, and even that's only in principle, because that backend doesn't enable alias disassembly in any case (it doesn't `#define PRINT_ALIAS_INSTR` before including `HexagonGenAsmWriter.inc`).

I thought it would be helpful to get the bug fix into Tablegen itself as soon as possible in case anyone else's out-of-tree or in-development work is affected. But if you'd prefer to leave it unfixed until an end-to-end test case is available, then I can come back to this later.


Repository:
  rL LLVM

https://reviews.llvm.org/D53816