[llvm] r345469 - [DAGCombiner] Better constant vector support for FCOPYSIGN.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Sat Oct 27 18:32:49 2018
New Revision: 345469

URL: http://llvm.org/viewvc/llvm-project?rev=345469&view=rev
Log:
[DAGCombiner] Better constant vector support for FCOPYSIGN.

Enable constant folding when both operands are vectors of constants.

Turn into FNEG/FABS when the RHS is a splat constant vector.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/sse1-fcopysign.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=345469&r1=345468&r2=345469&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sat Oct 27 18:32:49 2018
@@ -11590,15 +11590,15 @@ static inline bool CanCombineFCOPYSIGN_E
 SDValue DAGCombiner::visitFCOPYSIGN(SDNode *N) {
   SDValue N0 = N->getOperand(0);
   SDValue N1 = N->getOperand(1);
-  ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
-  ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
+  bool N0CFP = isConstantFPBuildVectorOrConstantFP(N0);
+  bool N1CFP = isConstantFPBuildVectorOrConstantFP(N1);
   EVT VT = N->getValueType(0);
 
   if (N0CFP && N1CFP) // Constant fold
     return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), VT, N0, N1);
 
-  if (N1CFP) {
-    const APFloat &V = N1CFP->getValueAPF();
+  if (ConstantFPSDNode *N1C = isConstOrConstSplatFP(N->getOperand(1))) {
+    const APFloat &V = N1C->getValueAPF();
     // copysign(x, c1) -> fabs(x)       iff ispos(c1)
     // copysign(x, c1) -> fneg(fabs(x)) iff isneg(c1)
     if (!V.isNegative()) {

Modified: llvm/trunk/test/CodeGen/X86/sse1-fcopysign.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse1-fcopysign.ll?rev=345469&r1=345468&r2=345469&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse1-fcopysign.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse1-fcopysign.ll Sat Oct 27 18:32:49 2018
@@ -43,18 +43,12 @@ define float @f32_neg(float %a, float %b
 define <4 x float> @v4f32_pos(<4 x float> %a, <4 x float> %b) nounwind {
 ; X86-LABEL: v4f32_pos:
 ; X86:       # %bb.0:
-; X86-NEXT:    movaps {{.*#+}} xmm1 = [1,1,1,1]
-; X86-NEXT:    andps {{\.LCPI.*}}, %xmm1
 ; X86-NEXT:    andps {{\.LCPI.*}}, %xmm0
-; X86-NEXT:    orps %xmm1, %xmm0
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: v4f32_pos:
 ; X64:       # %bb.0:
-; X64-NEXT:    movaps {{.*#+}} xmm1 = [1,1,1,1]
-; X64-NEXT:    andps {{.*}}(%rip), %xmm1
 ; X64-NEXT:    andps {{.*}}(%rip), %xmm0
-; X64-NEXT:    orps %xmm1, %xmm0
 ; X64-NEXT:    retq
   %tmp = tail call <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>)
   ret <4 x float> %tmp
@@ -63,18 +57,12 @@ define <4 x float> @v4f32_pos(<4 x float
 define <4 x float> @v4f32_neg(<4 x float> %a, <4 x float> %b) nounwind {
 ; X86-LABEL: v4f32_neg:
 ; X86:       # %bb.0:
-; X86-NEXT:    movaps {{.*#+}} xmm1 = [-1,-1,-1,-1]
-; X86-NEXT:    andps {{\.LCPI.*}}, %xmm1
-; X86-NEXT:    andps {{\.LCPI.*}}, %xmm0
-; X86-NEXT:    orps %xmm1, %xmm0
+; X86-NEXT:    orps {{\.LCPI.*}}, %xmm0
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: v4f32_neg:
 ; X64:       # %bb.0:
-; X64-NEXT:    movaps {{.*#+}} xmm1 = [-1,-1,-1,-1]
-; X64-NEXT:    andps {{.*}}(%rip), %xmm1
-; X64-NEXT:    andps {{.*}}(%rip), %xmm0
-; X64-NEXT:    orps %xmm1, %xmm0
+; X64-NEXT:    orps {{.*}}(%rip), %xmm0
 ; X64-NEXT:    retq
   %tmp = tail call <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> <float -1.0, float -1.0, float -1.0, float -1.0>)
   ret <4 x float> %tmp