[PATCH] D49671: [SchedModel] Propagate read advance cycles to implicit operands outside instruction descriptor

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa marked an inline comment as done.
jonpa added a comment.

In https://reviews.llvm.org/D49671#1278005, @bcahoon wrote:

> In https://reviews.llvm.org/D49671#1277445, @kparzysz wrote:
>
> > Hexagon packets (bundles) have 4 slots, numbered 0..3. Each one of the three instructions (2 x `S2_extractu`, and `PS_call_nr`) can only go in slots 2 or 3, so something went horribly wrong.
> >
> > As it is now, this is very bad, so please do not commit this until we figure this out.
>
>
> I committed a patch that fixes this problem, so ps_call_nr.ll should pass now.


Thanks, I have confirmed that the test case passes now with the patch.

Now that the X86, AMDGPU and Hexagon test failures are handled, only the ARM and Thumb2 test updates are left to be reviewed, please.


https://reviews.llvm.org/D49671