[PATCH] D53776: [DAGCombiner] Fix for big endian in ForwardStoreValueToDirectLoad

Bjorn Pettersson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 26 13:24:52 PDT 2018


bjope created this revision.
bjope added a reviewer: niravd.
Herald added subscribers: kristof.beyls, javed.absar.

Normalize the offset for endianess before checking
if the store cover the load in ForwardStoreValueToDirectLoad.

Without this we missed out on some optimizations for big
endian targets. If for example having a 4 bytes store followed
by a 1 byte load, loading the least significant byte from the
store, the STCoversLD check would fail (see @test4 in
test/CodeGen/AArch64/load-store-forwarding.ll).

This patch also fixes a problem seen in an out-of-tree target.
The target has i40 as a legal type, it is big endian,
and the StoreSize for i40 is 48 bits. So when normalizing
the offset for endianess we need to take the StoreSize into
account (assuming that padding added when storing into
a larger StoreSize always is added at the most significant
end).


Repository:
  rL LLVM

https://reviews.llvm.org/D53776

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/AArch64/load-store-forwarding.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D53776.171342.patch
Type: text/x-patch
Size: 4369 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20181026/8f673cd3/attachment.bin>


More information about the llvm-commits mailing list