[PATCH] D52010: RegAllocFast: Rewrite and improve

[Matthias Braun via Phabricator via llvm-commits]

MatzeB added a comment.

- I am slowly adatpting all the tests to the changes here; I have a commit fixing ~100 of them but there is still maybe 30-40 to go.
- I believe I have the first two asserts fixed locally here.
- The 3rd assert is picking up invalid MIR (a value is used before it is defined), my local version now has a commandline flag that allows us to disable that assert for the couple tests that show invalid MIR (planning to file PRs for the target owners to fix, so we can remove the commandline flag once the last test is fixed).



In https://reviews.llvm.org/D52010#1273280, @arsenm wrote:

> I see a few different assertions in tests with this patch. Did you see these before or are they regressions?
>
> In a few ARM tests during ARMExpandPseudo:
>
> Assertion failed: (!(isKill && isDef) && "Kill flag on def"), function CreateReg, file ../include/llvm/CodeGen/MachineOperand.h, line 76
>
> In one test:
>  Assertion failed: ((LRI->LastUse == &MI || MO.isTied() || !isRegUsedInInstr(LRI->PhysReg)) && "assigned reg free"), function useVirtReg, file ../lib/CodeGen/RegAllocFast.cpp, line 723.
>
> In a few different targets' tests:
>  Assertion failed: (MBB != &MBB->getParent()->front() && "no reload in start block"), function reloadAtBegin, file ../lib/CodeGen/RegAllocFast.cpp, line 320.





Repository:
  rL LLVM

https://reviews.llvm.org/D52010