[llvm] r345033 - [InstCombine] add/move tests for select with inverted condition; NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 23 07:37:29 PDT 2018


Author: spatel
Date: Tue Oct 23 07:37:29 2018
New Revision: 345033

URL: http://llvm.org/viewvc/llvm-project?rev=345033&view=rev
Log:
[InstCombine] add/move tests for select with inverted condition; NFC

The transform is broken in 2 ways - it doesn't correct metadata (or even drop it),
and it doesn't work with vectors with undef elements.

Modified:
    llvm/trunk/test/Transforms/InstCombine/select_meta.ll
    llvm/trunk/test/Transforms/InstCombine/xor.ll

Modified: llvm/trunk/test/Transforms/InstCombine/select_meta.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/select_meta.ll?rev=345033&r1=345032&r2=345033&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/select_meta.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/select_meta.ll Tue Oct 23 07:37:29 2018
@@ -298,6 +298,45 @@ define i32 @umax2(i32 %x) {
   ret i32 %sel
 }
 
+; FIXME: The condition is inverted, and the select ops are swapped. The metadata should be swapped.
+
+define i32 @not_cond(i1 %c, i32 %tv, i32 %fv) {
+; CHECK-LABEL: @not_cond(
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[C:%.*]], i32 [[FV:%.*]], i32 [[TV:%.*]], !prof ![[$MD1]]
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %notc = xor i1 %c, true
+  %r = select i1 %notc, i32 %tv, i32 %fv, !prof !1
+  ret i32 %r
+}
+
+; FIXME: The condition is inverted, and the select ops are swapped. The metadata should be swapped.
+
+define <2 x i32> @not_cond_vec(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv) {
+; CHECK-LABEL: @not_cond_vec(
+; CHECK-NEXT:    [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[FV:%.*]], <2 x i32> [[TV:%.*]], !prof ![[$MD1]]
+; CHECK-NEXT:    ret <2 x i32> [[R]]
+;
+  %notc = xor <2 x i1> %c, <i1 true, i1 true>
+  %r = select <2 x i1> %notc, <2 x i32> %tv, <2 x i32> %fv, !prof !1
+  ret <2 x i32> %r
+}
+
+; FIXME: Should match vector 'not' with undef element. After that...
+; FIXME: The condition is inverted, and the select ops are swapped. The metadata should be swapped.
+
+define <2 x i32> @not_cond_vec_undef(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv) {
+; CHECK-LABEL: @not_cond_vec_undef(
+; CHECK-NEXT:    [[NOTC:%.*]] = xor <2 x i1> [[C:%.*]], <i1 undef, i1 true>
+; CHECK-NEXT:    [[R:%.*]] = select <2 x i1> [[NOTC]], <2 x i32> [[TV:%.*]], <2 x i32> [[FV:%.*]], !prof ![[$MD1]]
+; CHECK-NEXT:    ret <2 x i32> [[R]]
+;
+  %notc = xor <2 x i1> %c, <i1 undef, i1 true>
+  %r = select <2 x i1> %notc, <2 x i32> %tv, <2 x i32> %fv, !prof !1
+  ret <2 x i32> %r
+}
+
+
 !1 = !{!"branch_weights", i32 2, i32 10}
 !2 = !{!"branch_weights", i32 3, i32 10}
 

Modified: llvm/trunk/test/Transforms/InstCombine/xor.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/xor.ll?rev=345033&r1=345032&r2=345033&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/xor.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/xor.ll Tue Oct 23 07:37:29 2018
@@ -190,16 +190,6 @@ define void @test20(i32 %A, i32 %B) {
   ret void
 }
 
-define i32 @test21(i1 %C, i32 %A, i32 %B) {
-; CHECK-LABEL: @test21(
-; CHECK-NEXT:    [[D:%.*]] = select i1 [[C:%.*]], i32 [[B:%.*]], i32 [[A:%.*]]
-; CHECK-NEXT:    ret i32 [[D]]
-;
-  %C2 = xor i1 %C, true
-  %D = select i1 %C2, i32 %A, i32 %B
-  ret i32 %D
-}
-
 define i32 @test22(i1 %X) {
 ; CHECK-LABEL: @test22(
 ; CHECK-NEXT:    [[Z:%.*]] = zext i1 [[X:%.*]] to i32




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