[PATCH] D53252: [WebAssembly] Implement vector sext_inreg and tests with comparisons

[Heejin Ahn via Phabricator via llvm-commits]

aheejin added a comment.

Apparently what you did is just to expand `SEXT_INREG`, but I'm not sure why do results of some existing test cases that used to work well with a single instruction now have several instructions..?



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Comment at: test/CodeGen/WebAssembly/simd-comparisons.ll:812
+; SIMD128-NEXT: v128.and $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}}
+; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}}
+; SIMD128-NEXT: return $pop[[R]]{{$}}
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What is this sequence? Why does one instruction become four? 😨Why does this try to compare `$0` with `$0`?


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Comment at: test/CodeGen/WebAssembly/simd-comparisons.ll:910
+; SIMD128-NEXT: f32x4.le $push[[T0:[0-9]+]]=, $0, $1{{$}}
+; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
+; SIMD128-NEXT: return $pop[[R]]{{$}}
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Why doesn't it use `gt_u` directly and does it with two instructions? There are also other similar tests..


Repository:
  rL LLVM

https://reviews.llvm.org/D53252