[PATCH] D53359: AMDGPU: Remove PHI loop condition optimization

Nicolai Hähnle via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 17 02:11:53 PDT 2018


nhaehnle created this revision.
nhaehnle added reviewers: arsenm, rampitec, tpr.
Herald added subscribers: t-tye, dstuttard, yaxunl, wdng, jvesely, kzhuravl.

The optimization to early break out of loops if all threads are dead was
never fully implemented.

But the PHI node analyzing is actually causing a number of problems, so
remove all the extra code for it.

(This does actually regress code quality in a few places because it
 ends up relying more heavily on phi's of i1, which we don't do a
 great job with. However, since it fixes real bugs in the wild, we
 should take this change. I have some prototype changes to improve
 i1 lowering in general -- not just for control flow -- which should
 help recover the code quality, I just need to make those changes
 fit for general consumption. -- Nicolai)

Change-Id: I6fc6c6c8961857ac6009fcfb9f7e5e48dc23fbb1
Patch-by: Christian König <christian.koenig at amd.com>


Repository:
  rL LLVM

https://reviews.llvm.org/D53359

Files:
  include/llvm/IR/IntrinsicsAMDGPU.td
  lib/Target/AMDGPU/AMDGPUInstrInfo.td
  lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
  lib/Target/AMDGPU/SIFixSGPRCopies.cpp
  lib/Target/AMDGPU/SIInstructions.td
  lib/Target/AMDGPU/SILowerControlFlow.cpp
  test/CodeGen/AMDGPU/loop_break.ll
  test/CodeGen/AMDGPU/multilevel-break.ll
  test/CodeGen/AMDGPU/nested-loop-conditions.ll
  test/CodeGen/AMDGPU/valu-i1.ll

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