[PATCH] D53323: [PowerPC][NFC] Fix bugs in r+r to r+i conversion

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai created this revision.
nemanjai added reviewers: steven.zhang, jsji, hfinkel, echristo.
Herald added a subscriber: kbarton.

The D-Form VSX loads introduced in ISA 3.0 are not direct D-Form equivalent of the corresponding X-Forms since they only target the Altivec registers.
Namely LXSSPX can load into any of the 64 VSX registers whereas LXSSP can only load into the upper 32 VSX registers. Similarly with the remaining affected instructions.

There is currently no way that I can see to trigger the bug, but as we add other ways of exploiting these instructions, there may very well be instances that do.

This is an NFC patch in practical terms since the changes it introduces can not be triggered without an MIR test.


Repository:
  rL LLVM

https://reviews.llvm.org/D53323

Files:
  lib/Target/PowerPC/PPCInstrInfo.cpp
  lib/Target/PowerPC/PPCInstrInfo.h
  test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir

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