[PATCH] D53144: [MachineCSE][GlobalISel] Making sure MachineCSE works mid-GlobalISel (again)

[Roman Tereshin via Phabricator via llvm-commits]

rtereshin added inline comments.


================
Comment at: lib/CodeGen/MachineCSE.cpp:258
+    if (!TRI->isCallerPreservedPhysReg(Reg, *MI->getMF()) &&
+        (!MRI->reservedRegsFrozen() || !MRI->isConstantPhysReg(Reg)))
       for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
----------------
`MachineRegisterInfo::isConstantPhysReg` expects the reserved registers to be frozen.
The problem doesn't trigger post-ISel as most (if not all) targets freeze reserved registers
right after ISel. Here I have inlined by hand the `MachineRegisterInfo:: isCallerPreservedOrConstPhysReg`
and protected half of the condition. There is no test covering this as the only way to insert
a new pass (MachineCSE) from a command line I know of is `llc`s `-run-pass` option, which only
works with MIR, but MIRParser freezes reserved registers upon `MachineFunction`s creation,
making it impossible to reproduce the state that exposes the issue.


================
Comment at: lib/CodeGen/MachineRegisterInfo.cpp:93
 bool
 MachineRegisterInfo::constrainRegAttrs(unsigned Reg,
                                        unsigned ConstrainingReg,
----------------
Apparently, for now this is only used by MachineCSE.
The changes are NFC for any pipeline but one that
contains MachineCSE mid-GlobalISel.


Repository:
  rL LLVM

https://reviews.llvm.org/D53144