[PATCH] D53283: AMDGPU: Divergence-driven selection of scalar buffer load intrinsics

Nicolai Hähnle via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 15 04:40:54 PDT 2018


nhaehnle created this revision.
nhaehnle added reviewers: arsenm, alex-t, rampitec, tpr.
Herald added subscribers: t-tye, dstuttard, yaxunl, wdng, jvesely, kzhuravl.

Moving SMRD to VMEM in SIFixSGPRCopies is rather bad for performance if
the load is really uniform. So select the scalar load intrinsics directly
to either VMEM or SMRD buffer loads based on divergence analysis.

If an offset happens to end up in a VGPR -- either because a floating
point calculation was involved, or due to other remaining deficiencies
in SIFixSGPRCopies -- we use v_readfirstlane.

There is some unrelated churn in tests since we now select MUBUF offsets
in a unified way with non-scalar buffer loads.

Change-Id: I170e6816323beb1348677b358c9d380865cd1a19


Repository:
  rL LLVM

https://reviews.llvm.org/D53283

Files:
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIISelLowering.h
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.h
  lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
  test/CodeGen/AMDGPU/smrd-fold-offset.mir
  test/CodeGen/AMDGPU/smrd.ll

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