[PATCH] D53201: [DAGCombiner] reduce insert+bitcast+extract vector ops to truncate (PR39016)

[Sanjay Patel via Phabricator via llvm-commits]

spatel added inline comments.


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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:15526
+      unsigned VecEltBitWidth = VT.getScalarSizeInBits();
+      BCTruncElt = IsLE ? 0 : XBitWidth / VecEltBitWidth - 1;
+
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craig.topper wrote:
> Does this work correctly on big endian for non power of 2 element count or element size such that XBitWidth isn't evenly divisible by VecEltBitWidth.
I'll add a test with non-power-of-2 vector size, but I don't see a way to actually exercise that possibility given that this transform is only happening late (legal types are already in effect, but we can make that explicit).
AFAICT, the scalar bitwidth must be a multiple of the vector element bitwidth, so I'll add an assert for that.


https://reviews.llvm.org/D53201