[PATCH] D52977: [RISCV] Introduce codegen patterns for instructions introduced in RV64I

[Alex Bradbury via Phabricator via llvm-commits]

asb updated this revision to Diff 169514.
asb added a comment.

Update to add zexti32 PatFrag and to eliminate unnecessary masking of shift amount values.

@sabuasal: The majority of the tests in test/CodeGen/RISCV could do with gaining RV64 CHECK lines. I was intending to have this patch just update tests directly related to the new patterns, and have a future patch update other tests (select, branch, etc). But I can incorporate all the test updates in this patch if preferred.


https://reviews.llvm.org/D52977

Files:
  lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  lib/Target/RISCV/RISCVInstrInfo.td
  test/CodeGen/RISCV/alu16.ll
  test/CodeGen/RISCV/alu32.ll
  test/CodeGen/RISCV/alu64.ll
  test/CodeGen/RISCV/alu8.ll
  test/CodeGen/RISCV/mem64.ll
  test/CodeGen/RISCV/sext-zext-trunc.ll

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