[PATCH] D53152: [Hexagon] Restrict compound instructions with constant value.

Krzysztof Parzyszek via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 11 11:58:20 PDT 2018


kparzysz added inline comments.


================
Comment at: lib/Target/Hexagon/HexagonPatterns.td:262
+// do not generate the compound instructions (S4_andi_asl_ri, S4_ori_asl_ri,
+// S4_andi_lsr_ri, S4_ori_lsr_ri instructions).
+// It is not always profitable, as some times we end up with a transfer.
----------------
Those are not the instructions you're trying to avoid.


================
Comment at: lib/Target/Hexagon/HexagonPatterns.td:268
+// ra = and (#65820, lsr(ra, #8)); rb = xor(rb, ra)
+class Su_NonImm<PatFrag Op>
+  : PatFrag<Op.Operands, !head(Op.Fragments), [{
----------------
Please change the name to something shorter, e.g. `Su_ni`, or `Su_ni1` to indicate that it only checks operand(1).


================
Comment at: test/CodeGen/Hexagon/constant_compound.ll:19
+entry:
+  %0 = zext i16 %varB to i32
+  %1 = and i16 %varA, 255
----------------
Please run -instnamer on this testcase.


================
Comment at: test/CodeGen/Hexagon/constant_compound.ll:50
+
+attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv65" "target-features"="-long-calls" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { nounwind readnone }
----------------
Please remove all attributes except `nounwind`, `readnone`, and `target-cpu`/`target-features`. Remove `-long-calls` from `target-features`.


Repository:
  rL LLVM

https://reviews.llvm.org/D53152





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