[PATCH] D52948: [WebAssembly] Fix fneg lowering

Thomas Lively via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 9 16:25:25 PDT 2018


tlively marked an inline comment as done.
tlively added inline comments.


================
Comment at: lib/Target/WebAssembly/WebAssemblyInstrSIMD.td:187
                            vec#".neg\t$dst, $vec", vec#".neg", simdop>;
 }
+multiclass SIMDNegFP<ValueType vec_t, string vec, bits<32> simdop> {
----------------
aheejin wrote:
> Can we define `ivneg` or something like
> ```
> // Integer vector negation
> def ivneg : PatFrag<(ops node:$in), (sub immAllZeroesV, node:$in)>;
> ```
> And change this pattern to resemble the simpler `SIMDNegFP` one, using `ivneg` in place of `fneg`, to make it simpler and symmetrical? The reason I said `ivneg` instead of `ineg` is there's already an [[ https://github.com/llvm-mirror/llvm/blob/8cc4d7e1c6c2a61e560268413a1355d0260a81b3/include/llvm/Target/TargetSelectionDAG.td#L757 | `ineg` ]] node there, which does not seem to support vectors.
> 
> And this is irrelevant to this CL, but there also seems to be a [[ https://github.com/llvm-mirror/llvm/blob/8cc4d7e1c6c2a61e560268413a1355d0260a81b3/include/llvm/Target/TargetSelectionDAG.td#L756 | `vnot` ]] node. Can we possibly use this to simplify `SIMDNot` pattern?
> 
> 
Good call. `vnot` is on my list of things to do!


================
Comment at: test/CodeGen/WebAssembly/simd-arith.ll:747
 define <4 x float> @neg_v4f32(<4 x float> %x) {
-  %a = fsub <4 x float> <float 0., float 0., float 0., float 0.>, %x
+  %a = fsub fast <4 x float> <float 0.0, float 0.0, float 0.0, float 0.0>, %x
   ret <4 x float> %a
----------------
aheejin wrote:
> To make this to work, does a floating point instruction has to have `fast` attribute, or only some of these [[ http://llvm.org/docs/LangRef.html#fast-math-flags | fast-math flags ]]?
Looks like only `nsz` was necessary.


Repository:
  rL LLVM

https://reviews.llvm.org/D52948





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