[PATCH] D53022: [SelectionDAG] Enable iX SimplifyDemandedBits to vXi1 SimplifyDemandedVectorElts simplification

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 9 07:16:55 PDT 2018


RKSimon created this revision.
RKSimon added a reviewer: craig.topper.

Patch showing the effect of enabling bool vector oversimplification.

Non-VLX builds can simplify a kshift shuffle, but VLX builds simplify:

insert_subvector v8i zeroinitializer, v2i --> insert_subvector v8i undef, v2i

Preventing the removal of the AND to clear the upper bits of result


Repository:
  rL LLVM

https://reviews.llvm.org/D53022

Files:
  lib/CodeGen/SelectionDAG/TargetLowering.cpp
  test/CodeGen/X86/avx512vl-vec-masked-cmp.ll

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