[PATCH] D52962: [RISCV] Constant materialisation for RV64I

[Bruce Hoult via Phabricator via llvm-commits]

brucehoult added a comment.

In https://reviews.llvm.org/D52962#1258544, @psnobl wrote:

> Wouldn't it better to put more complicated constants (requiring 4 and more instructions to materialize) in constant pool and load them from there?


gcc does that, at some point. It depends. If you can guarantee a cache hit for the load then it can be better. If you can't then you could be looking at a big slowdown. Typical processors go to a lot of trouble to prefetch the instruction stream. Eight instructions and 20 to 24 bytes to load an eight byte literal isn't too horrible. The load from a pool approach is going to generally take two 4 byte instructions (auipc/ld or lui/ld) plus the 8 byte literal itself, for a total of 16 bytes. Plus, it might cost anything from half a dozen clock cycles to several hundred clock cycles to get the cache line. Well, let's say on average it's going to be in L2 cache. It's not a clear win. And the worst case is awful. All to save 4 to 8 bytes of code and maybe four clock cycles in the best case.


https://reviews.llvm.org/D52962