[PATCH] D52980: [X86][AVX1] Enable *_EXTEND_VECTOR_INREG lowering of 256-bit vectors

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 9 00:45:00 PDT 2018


This revision was automatically updated to reflect the committed changes.
Closed by commit rL344019: [X86][AVX1] Enable *_EXTEND_VECTOR_INREG lowering of 256-bit vectors (authored by RKSimon, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D52980?vs=168711&id=168752#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D52980

Files:
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/test/CodeGen/X86/avg.ll
  llvm/trunk/test/CodeGen/X86/pmaddubsw.ll
  llvm/trunk/test/CodeGen/X86/psubus.ll
  llvm/trunk/test/CodeGen/X86/vector-sext.ll
  llvm/trunk/test/CodeGen/X86/vector-zext.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D52980.168752.patch
Type: text/x-patch
Size: 21362 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20181009/6f2305c1/attachment.bin>


More information about the llvm-commits mailing list