[PATCH] D52970: [X86][AVX2] Enable ZERO_EXTEND_VECTOR_INREG lowering of 256-bit vectors

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Oct 7 06:54:18 PDT 2018


RKSimon created this revision.
RKSimon added reviewers: craig.topper, spatel.

Some necessary yak shaving before lowering *_EXTEND_VECTOR_INREG 256-bit vectors on AVX1 targets as suggested by https://reviews.llvm.org/D52964.


Repository:
  rL LLVM

https://reviews.llvm.org/D52970

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/avg.ll
  test/CodeGen/X86/pr35443.ll
  test/CodeGen/X86/vector-zext.ll

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