[PATCH] D52912: [SelectionDAG] allow FP binops in SimplifyDemandedVectorElts

[Sanjay Patel via Phabricator via llvm-commits]

spatel updated this revision to Diff 168527.
spatel added a reviewer: andreadb.
spatel added a comment.

Patch updated - once again, no code changes, but rebased after:
https://reviews.llvm.org/rL343882
...so now we don't have any more sched test diffs.
I was completely missing the point of those tests (to check both reg-reg and reg-mem variants of the opcodes).


https://reviews.llvm.org/D52912

Files:
  lib/CodeGen/SelectionDAG/TargetLowering.cpp
  test/CodeGen/X86/avx512-hadd-hsub.ll
  test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
  test/CodeGen/X86/vector-shuffle-combining.ll

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