[PATCH] D52426: [X86] Move X86DAGToDAGISel::matchBEXTRFromAnd() into X86ISelLowering

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added inline comments.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:35407
 
+  if (SDValue R = combineShiftAndIntoBEXTR(N, DAG, Subtarget))
+    return R;
----------------
craig.topper wrote:
> This should probably be below the LegalizeOps check. We should give ample opportunity for AND based DAG combines to optimize this.
I'm not sure about the test for this.
Also, should it be *right* after the `isBeforeLegalizeOps()`, or somewhere at the end of the block?


Repository:
  rL LLVM

https://reviews.llvm.org/D52426