[llvm] r343516 - Revert r343499 and r343498. X86 test improvements
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 1 11:40:44 PDT 2018
Author: ctopper
Date: Mon Oct 1 11:40:44 2018
New Revision: 343516
URL: http://llvm.org/viewvc/llvm-project?rev=343516&view=rev
Log:
Revert r343499 and r343498. X86 test improvements
There's a subtle bug in the handling of truncate from i32/i64 to i32 without minsize.
I'll be adding more test cases and trying to find a fix.
Modified:
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/trunk/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
llvm/trunk/test/CodeGen/X86/test-shrink.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=343516&r1=343515&r2=343516&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Oct 1 11:40:44 2018
@@ -3392,11 +3392,8 @@ void X86DAGToDAGISel::Select(SDNode *Nod
SDValue N0 = Node->getOperand(0);
SDValue N1 = Node->getOperand(1);
- // Save the original VT of the compare.
- MVT CmpVT = N0.getSimpleValueType();
-
- // We can peek through truncates, but we need to be careful below.
- if (N0.getOpcode() == ISD::TRUNCATE && N0.hasOneUse())
+ if (N0.getOpcode() == ISD::TRUNCATE && N0.hasOneUse() &&
+ hasNoSignedComparisonUses(Node))
N0 = N0.getOperand(0);
// Look for (X86cmp (and $op, $imm), 0) and see if we can convert it to
@@ -3412,35 +3409,25 @@ void X86DAGToDAGISel::Select(SDNode *Nod
MVT VT;
int SubRegOp;
- unsigned ROpc, MOpc;
-
- // For each of these checks we need to be careful if the sign flag is
- // being used. It is only safe to use the sign flag in two conditions,
- // either the sign bit in the shrunken mask is zero or the final test
- // size is equal to the original compare size.
+ unsigned Op;
if (isUInt<8>(Mask) &&
- (!(Mask & 0x80) || CmpVT == MVT::i8 ||
- hasNoSignedComparisonUses(Node))) {
+ (!(Mask & 0x80) || hasNoSignedComparisonUses(Node))) {
// For example, convert "testl %eax, $8" to "testb %al, $8"
VT = MVT::i8;
SubRegOp = X86::sub_8bit;
- ROpc = X86::TEST8ri;
- MOpc = X86::TEST8mi;
+ Op = X86::TEST8ri;
} else if (OptForMinSize && isUInt<16>(Mask) &&
- (!(Mask & 0x8000) || CmpVT == MVT::i16 ||
- hasNoSignedComparisonUses(Node))) {
+ (!(Mask & 0x8000) || hasNoSignedComparisonUses(Node))) {
// For example, "testl %eax, $32776" to "testw %ax, $32776".
// NOTE: We only want to form TESTW instructions if optimizing for
// min size. Otherwise we only save one byte and possibly get a length
// changing prefix penalty in the decoders.
VT = MVT::i16;
SubRegOp = X86::sub_16bit;
- ROpc = X86::TEST16ri;
- MOpc = X86::TEST16mi;
+ Op = X86::TEST16ri;
} else if (isUInt<32>(Mask) && N0.getValueType() != MVT::i16 &&
- (!(Mask & 0x80000000) || CmpVT == MVT::i32 ||
- hasNoSignedComparisonUses(Node))) {
+ (!(Mask & 0x80000000) || hasNoSignedComparisonUses(Node))) {
// For example, "testq %rax, $268468232" to "testl %eax, $268468232".
// NOTE: We only want to run that transform if N0 is 32 or 64 bits.
// Otherwize, we find ourselves in a position where we have to do
@@ -3448,37 +3435,21 @@ void X86DAGToDAGISel::Select(SDNode *Nod
// they had a good reason not to and do not promote here.
VT = MVT::i32;
SubRegOp = X86::sub_32bit;
- ROpc = X86::TEST32ri;
- MOpc = X86::TEST32mi;
+ Op = X86::TEST32ri;
} else {
// No eligible transformation was found.
break;
}
- // FIXME: We should be able to fold loads here.
-
SDValue Imm = CurDAG->getTargetConstant(Mask, dl, VT);
SDValue Reg = N0.getOperand(0);
- // Emit a testl or testw.
- MachineSDNode *NewNode;
- SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4;
- if (tryFoldLoad(Node, N0.getNode(), Reg, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) {
- SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Imm,
- Reg.getOperand(0) };
- NewNode = CurDAG->getMachineNode(MOpc, dl, MVT::i32, MVT::Other, Ops);
- // Update the chain.
- ReplaceUses(Reg.getValue(1), SDValue(NewNode, 1));
- // Record the mem-refs
- CurDAG->setNodeMemRefs(NewNode,
- {cast<LoadSDNode>(Reg)->getMemOperand()});
- } else {
- // Extract the subregister if necessary.
- if (N0.getValueType() != VT)
- Reg = CurDAG->getTargetExtractSubreg(SubRegOp, dl, VT, Reg);
+ // Extract the subregister if necessary.
+ if (N0.getValueType() != VT)
+ Reg = CurDAG->getTargetExtractSubreg(SubRegOp, dl, VT, Reg);
- NewNode = CurDAG->getMachineNode(ROpc, dl, MVT::i32, Reg, Imm);
- }
+ // Emit a testl or testw.
+ SDNode *NewNode = CurDAG->getMachineNode(Op, dl, MVT::i32, Reg, Imm);
// Replace CMP with TEST.
ReplaceNode(Node, NewNode);
return;
Modified: llvm/trunk/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll?rev=343516&r1=343515&r2=343516&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll Mon Oct 1 11:40:44 2018
@@ -12,7 +12,8 @@ define i32 @main() nounwind {
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpq {{.*}}(%rip), %rax
; CHECK-NEXT: sbbl %eax, %eax
-; CHECK-NEXT: testb $-106, %al
+; CHECK-NEXT: andl $150, %eax
+; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: jle .LBB0_1
; CHECK-NEXT: # %bb.2: # %if.then
; CHECK-NEXT: movl $1, {{.*}}(%rip)
Modified: llvm/trunk/test/CodeGen/X86/test-shrink.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-shrink.ll?rev=343516&r1=343515&r2=343516&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/test-shrink.ll (original)
+++ llvm/trunk/test/CodeGen/X86/test-shrink.ll Mon Oct 1 11:40:44 2018
@@ -578,7 +578,8 @@ no:
define void @and16_trunc_8_sign(i16 %x) nounwind {
; CHECK-LINUX64-LABEL: and16_trunc_8_sign:
; CHECK-LINUX64: # %bb.0:
-; CHECK-LINUX64-NEXT: testb $-128, %dil
+; CHECK-LINUX64-NEXT: andl $128, %edi
+; CHECK-LINUX64-NEXT: testb %dil, %dil
; CHECK-LINUX64-NEXT: jg .LBB13_2
; CHECK-LINUX64-NEXT: # %bb.1: # %yes
; CHECK-LINUX64-NEXT: pushq %rax
@@ -591,7 +592,8 @@ define void @and16_trunc_8_sign(i16 %x)
; CHECK-WIN32-64: # %bb.0:
; CHECK-WIN32-64-NEXT: subq $40, %rsp
; CHECK-WIN32-64-NEXT: # kill: def $cx killed $cx def $ecx
-; CHECK-WIN32-64-NEXT: testb $-128, %cl
+; CHECK-WIN32-64-NEXT: andl $128, %ecx
+; CHECK-WIN32-64-NEXT: testb %cl, %cl
; CHECK-WIN32-64-NEXT: jg .LBB13_2
; CHECK-WIN32-64-NEXT: # %bb.1: # %yes
; CHECK-WIN32-64-NEXT: callq bar
@@ -602,7 +604,8 @@ define void @and16_trunc_8_sign(i16 %x)
; CHECK-X86-LABEL: and16_trunc_8_sign:
; CHECK-X86: # %bb.0:
; CHECK-X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; CHECK-X86-NEXT: testb $-128, %al
+; CHECK-X86-NEXT: andl $128, %eax
+; CHECK-X86-NEXT: testb %al, %al
; CHECK-X86-NEXT: jg .LBB13_2
; CHECK-X86-NEXT: # %bb.1: # %yes
; CHECK-X86-NEXT: calll bar
@@ -623,7 +626,8 @@ no:
define void @and32_trunc_8_sign(i32 %x) nounwind {
; CHECK-LINUX64-LABEL: and32_trunc_8_sign:
; CHECK-LINUX64: # %bb.0:
-; CHECK-LINUX64-NEXT: testb $-128, %dil
+; CHECK-LINUX64-NEXT: andl $128, %edi
+; CHECK-LINUX64-NEXT: testb %dil, %dil
; CHECK-LINUX64-NEXT: jg .LBB14_2
; CHECK-LINUX64-NEXT: # %bb.1: # %yes
; CHECK-LINUX64-NEXT: pushq %rax
@@ -635,7 +639,8 @@ define void @and32_trunc_8_sign(i32 %x)
; CHECK-WIN32-64-LABEL: and32_trunc_8_sign:
; CHECK-WIN32-64: # %bb.0:
; CHECK-WIN32-64-NEXT: subq $40, %rsp
-; CHECK-WIN32-64-NEXT: testb $-128, %cl
+; CHECK-WIN32-64-NEXT: andl $128, %ecx
+; CHECK-WIN32-64-NEXT: testb %cl, %cl
; CHECK-WIN32-64-NEXT: jg .LBB14_2
; CHECK-WIN32-64-NEXT: # %bb.1: # %yes
; CHECK-WIN32-64-NEXT: callq bar
@@ -645,7 +650,9 @@ define void @and32_trunc_8_sign(i32 %x)
;
; CHECK-X86-LABEL: and32_trunc_8_sign:
; CHECK-X86: # %bb.0:
-; CHECK-X86-NEXT: testb $-128, {{[0-9]+}}(%esp)
+; CHECK-X86-NEXT: movl $128, %eax
+; CHECK-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; CHECK-X86-NEXT: testb %al, %al
; CHECK-X86-NEXT: jg .LBB14_2
; CHECK-X86-NEXT: # %bb.1: # %yes
; CHECK-X86-NEXT: calll bar
@@ -666,7 +673,8 @@ no:
define void @and64_trunc_8_sign(i64 %x) nounwind {
; CHECK-LINUX64-LABEL: and64_trunc_8_sign:
; CHECK-LINUX64: # %bb.0:
-; CHECK-LINUX64-NEXT: testb $-128, %dil
+; CHECK-LINUX64-NEXT: andl $128, %edi
+; CHECK-LINUX64-NEXT: testb %dil, %dil
; CHECK-LINUX64-NEXT: jg .LBB15_2
; CHECK-LINUX64-NEXT: # %bb.1: # %yes
; CHECK-LINUX64-NEXT: pushq %rax
@@ -678,7 +686,8 @@ define void @and64_trunc_8_sign(i64 %x)
; CHECK-WIN32-64-LABEL: and64_trunc_8_sign:
; CHECK-WIN32-64: # %bb.0:
; CHECK-WIN32-64-NEXT: subq $40, %rsp
-; CHECK-WIN32-64-NEXT: testb $-128, %cl
+; CHECK-WIN32-64-NEXT: andl $128, %ecx
+; CHECK-WIN32-64-NEXT: testb %cl, %cl
; CHECK-WIN32-64-NEXT: jg .LBB15_2
; CHECK-WIN32-64-NEXT: # %bb.1: # %yes
; CHECK-WIN32-64-NEXT: callq bar
@@ -688,7 +697,9 @@ define void @and64_trunc_8_sign(i64 %x)
;
; CHECK-X86-LABEL: and64_trunc_8_sign:
; CHECK-X86: # %bb.0:
-; CHECK-X86-NEXT: testb $-128, {{[0-9]+}}(%esp)
+; CHECK-X86-NEXT: movl $128, %eax
+; CHECK-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; CHECK-X86-NEXT: testb %al, %al
; CHECK-X86-NEXT: jg .LBB15_2
; CHECK-X86-NEXT: # %bb.1: # %yes
; CHECK-X86-NEXT: calll bar
@@ -709,7 +720,8 @@ no:
define void @and32_trunc_16_sign(i32 %x) minsize nounwind {
; CHECK-LINUX64-LABEL: and32_trunc_16_sign:
; CHECK-LINUX64: # %bb.0:
-; CHECK-LINUX64-NEXT: testw $-32768, %di # imm = 0x8000
+; CHECK-LINUX64-NEXT: andl $32768, %edi # imm = 0x8000
+; CHECK-LINUX64-NEXT: testw %di, %di
; CHECK-LINUX64-NEXT: jg .LBB16_2
; CHECK-LINUX64-NEXT: # %bb.1: # %yes
; CHECK-LINUX64-NEXT: pushq %rax
@@ -721,7 +733,8 @@ define void @and32_trunc_16_sign(i32 %x)
; CHECK-WIN32-64-LABEL: and32_trunc_16_sign:
; CHECK-WIN32-64: # %bb.0:
; CHECK-WIN32-64-NEXT: subq $40, %rsp
-; CHECK-WIN32-64-NEXT: testw $-32768, %cx # imm = 0x8000
+; CHECK-WIN32-64-NEXT: andl $32768, %ecx # imm = 0x8000
+; CHECK-WIN32-64-NEXT: testw %cx, %cx
; CHECK-WIN32-64-NEXT: jg .LBB16_2
; CHECK-WIN32-64-NEXT: # %bb.1: # %yes
; CHECK-WIN32-64-NEXT: callq bar
@@ -731,7 +744,9 @@ define void @and32_trunc_16_sign(i32 %x)
;
; CHECK-X86-LABEL: and32_trunc_16_sign:
; CHECK-X86: # %bb.0:
-; CHECK-X86-NEXT: testw $-32768, {{[0-9]+}}(%esp) # imm = 0x8000
+; CHECK-X86-NEXT: movl $32768, %eax # imm = 0x8000
+; CHECK-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; CHECK-X86-NEXT: testw %ax, %ax
; CHECK-X86-NEXT: jg .LBB16_2
; CHECK-X86-NEXT: # %bb.1: # %yes
; CHECK-X86-NEXT: calll bar
@@ -752,7 +767,8 @@ no:
define void @and64_trunc_32_sign(i64 %x) minsize nounwind {
; CHECK-LINUX64-LABEL: and64_trunc_32_sign:
; CHECK-LINUX64: # %bb.0:
-; CHECK-LINUX64-NEXT: testw $-32768, %di # imm = 0x8000
+; CHECK-LINUX64-NEXT: andl $32768, %edi # imm = 0x8000
+; CHECK-LINUX64-NEXT: testw %di, %di
; CHECK-LINUX64-NEXT: jg .LBB17_2
; CHECK-LINUX64-NEXT: # %bb.1: # %yes
; CHECK-LINUX64-NEXT: pushq %rax
@@ -764,7 +780,8 @@ define void @and64_trunc_32_sign(i64 %x)
; CHECK-WIN32-64-LABEL: and64_trunc_32_sign:
; CHECK-WIN32-64: # %bb.0:
; CHECK-WIN32-64-NEXT: subq $40, %rsp
-; CHECK-WIN32-64-NEXT: testw $-32768, %cx # imm = 0x8000
+; CHECK-WIN32-64-NEXT: andl $32768, %ecx # imm = 0x8000
+; CHECK-WIN32-64-NEXT: testw %cx, %cx
; CHECK-WIN32-64-NEXT: jg .LBB17_2
; CHECK-WIN32-64-NEXT: # %bb.1: # %yes
; CHECK-WIN32-64-NEXT: callq bar
@@ -774,7 +791,9 @@ define void @and64_trunc_32_sign(i64 %x)
;
; CHECK-X86-LABEL: and64_trunc_32_sign:
; CHECK-X86: # %bb.0:
-; CHECK-X86-NEXT: testw $-32768, {{[0-9]+}}(%esp) # imm = 0x8000
+; CHECK-X86-NEXT: movl $32768, %eax # imm = 0x8000
+; CHECK-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; CHECK-X86-NEXT: testw %ax, %ax
; CHECK-X86-NEXT: jg .LBB17_2
; CHECK-X86-NEXT: # %bb.1: # %yes
; CHECK-X86-NEXT: calll bar
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