[PATCH] D46662: [X86] condition branches folding for three-way conditional codes

[Rong Xu via llvm-commits]

On Wed, Sep 26, 2018 at 10:57 PM Dávid Bolvanský via Phabricator <
reviews at reviews.llvm.org> wrote:

> xbolva00 added a comment.
>
> > I suggest to make this pass optional (i.e. make this pass opt-in for
> subtargets).
>
> @xur are you gonna work on this? As you already measured some numbers, you
> can enable it for haswell, skylake, etc..
>

Yes. I'm working on this.  I'm using the getprocFamily() Interface in
X86Subtarget.  Like

 switch (ST.getProcFamily()) {
    case X86Subtarget::IntelHaswell:
    case X86Subtarget::IntelBroadwell:
    case X86Subtarget::IntelSkylake:
    case X86Subtarget::IntelSKX:
    case X86Subtarget::IntelCannonlake:
          ... enable...
}

But the issue I'm having is for sandybridge or ivybridge processor, it
returns X86Subtarget::Other.
I'm have difficulty to include this two subtargets. Am I using the correct
interface?


>
>
> ================
> Comment at: test/CodeGen/X86/condbr_if.ll:35
> +
> +define dso_local i32 @length2_2(i32) {
> +  %2 = icmp sle i32 %0, 2
> ----------------
> We don't need "dso_local" here
>
> Will fix this.

>
> https://reviews.llvm.org/D46662
>
>
>
>
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