[llvm] r343125 - AMDGPU/SI: Change predicate to isCIOnly for 32-bit imm s_buffer_load* patterns

[Tom Stellard via llvm-commits]

Author: tstellar
Date: Wed Sep 26 09:53:36 2018
New Revision: 343125

URL: http://llvm.org/viewvc/llvm-project?rev=343125&view=rev
Log:
AMDGPU/SI: Change predicate to isCIOnly for 32-bit imm s_buffer_load* patterns

Summary:
This is essentially NFC, because the complex pattern used for these patterns
will fail on non-CI, but this makes the pattern consistent with other CI
smrd patterns.  It is also a performance improvement, because the pattern
will now fail earlier on non-CI.

Reviewers: arsenm, nhaehnle

Reviewed By: arsenm

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D52469

Modified:
    llvm/trunk/lib/Target/AMDGPU/SMInstructions.td

Modified: llvm/trunk/lib/Target/AMDGPU/SMInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SMInstructions.td?rev=343125&r1=343124&r2=343125&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SMInstructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/SMInstructions.td Wed Sep 26 09:53:36 2018
@@ -777,7 +777,7 @@ def : SMRD_Pattern_ci <"S_LOAD_DWORDX16"
 class SMLoad_Pattern_ci <string Instr, ValueType vt> : GCNPat <
   (vt (SIsbuffer_load v4i32:$sbase, (SMRDBufferImm32 i32:$offset), i1:$glc)),
   (!cast<InstSI>(Instr) $sbase, $offset, (as_i1imm $glc))> {
-  let OtherPredicates = [isCI]; // should this be isCIOnly?
+  let OtherPredicates = [isCIOnly];
 }
 
 def : SMLoad_Pattern_ci <"S_BUFFER_LOAD_DWORD_IMM_ci", i32>;