[PATCH] D52325: [WebAssembly] SIMD min and max

Thomas Lively via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 25 16:46:58 PDT 2018


tlively added inline comments.


================
Comment at: test/CodeGen/WebAssembly/simd-arith.ll:725
+  ret <4 x float> %a
+}
+
----------------
aheejin wrote:
> If we have a constant vector in the right hand side, it will be still lowered to `f32x4.min`, right?
No, not with an ordered comparison. If the constant (non-zero, non-NaN) vector is on the right and the variable vector on the left happens to contains a NaN, the ordered comparison will be false for that lane. Then the select will choose the constant from the right hand side rather than the NaN, so that scenario would not exhibit wasm's NaN propagation behavior.


Repository:
  rL LLVM

https://reviews.llvm.org/D52325





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