[PATCH] D52483: [AArch64][v8.5A] Add speculation barriers SSBB and PSSBB

[Oliver Stannard via Phabricator via llvm-commits]

olista01 created this revision.
Herald added a reviewer: javed.absar.
Herald added subscribers: llvm-commits, kristof.beyls.

This adds two new barrier instructions which can be used to restrict
speculative execution of load instructions.

Patch by Pablo Barrio!


Repository:
  rL LLVM

https://reviews.llvm.org/D52483

Files:
  lib/Target/AArch64/AArch64InstrInfo.td
  test/MC/AArch64/basic-a64-instructions.s
  test/MC/AArch64/csdb.s
  test/MC/AArch64/speculation-barriers.s
  test/MC/Disassembler/AArch64/basic-a64-instructions.txt
  test/MC/Disassembler/AArch64/csdb.txt
  test/MC/Disassembler/AArch64/speculation-barriers.txt


Index: test/MC/Disassembler/AArch64/speculation-barriers.txt
===================================================================
--- test/MC/Disassembler/AArch64/speculation-barriers.txt
+++ test/MC/Disassembler/AArch64/speculation-barriers.txt
@@ -1,4 +1,9 @@
 # RUN: llvm-mc -triple aarch64-none-linux-gnu --disassemble < %s | FileCheck %s
 
 [0x9f,0x22,0x03,0xd5]
-# CHECK: csdb
+[0x9f,0x30,0x03,0xd5]
+[0x9f,0x34,0x03,0xd5]
+
+# CHECK:      csdb
+# CHECK-NEXT: ssbb
+# CHECK-NEXT: pssbb
Index: test/MC/Disassembler/AArch64/basic-a64-instructions.txt
===================================================================
--- test/MC/Disassembler/AArch64/basic-a64-instructions.txt
+++ test/MC/Disassembler/AArch64/basic-a64-instructions.txt
@@ -3048,7 +3048,6 @@
 0x5f 0x37 0x3 0xd5
 0x5f 0x3f 0x3 0xd5
 
-# CHECK: dsb      #0
 # CHECK: dsb      #12
 # CHECK: dsb      sy
 # CHECK: dsb      oshld
@@ -3063,7 +3062,6 @@
 # CHECK: dsb      ld
 # CHECK: dsb      st
 # CHECK: dsb      sy
-0x9f 0x30 0x3 0xd5
 0x9f 0x3c 0x3 0xd5
 0x9f 0x3f 0x3 0xd5
 0x9f 0x31 0x3 0xd5
Index: test/MC/AArch64/speculation-barriers.s
===================================================================
--- test/MC/AArch64/speculation-barriers.s
+++ test/MC/AArch64/speculation-barriers.s
@@ -1,4 +1,9 @@
 // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding < %s | FileCheck %s
 
-  csdb
+csdb
+ssbb
+pssbb
+
 // CHECK: csdb   // encoding: [0x9f,0x22,0x03,0xd5]
+// CHECK: ssbb   // encoding: [0x9f,0x30,0x03,0xd5]
+// CHECK: pssbb  // encoding: [0x9f,0x34,0x03,0xd5]
Index: test/MC/AArch64/basic-a64-instructions.s
===================================================================
--- test/MC/AArch64/basic-a64-instructions.s
+++ test/MC/AArch64/basic-a64-instructions.s
@@ -3482,6 +3482,7 @@
 // CHECK: clrex                           // encoding: [0x5f,0x3f,0x03,0xd5]
 
         dsb #0
+        dsb #4
         dsb #12
         dsb #15
         dsb oshld
@@ -3496,7 +3497,8 @@
         dsb ld
         dsb st
         dsb sy
-// CHECK: dsb     #0                      // encoding: [0x9f,0x30,0x03,0xd5]
+// CHECK: ssbb                            // encoding: [0x9f,0x30,0x03,0xd5]
+// CHECK: pssbb                           // encoding: [0x9f,0x34,0x03,0xd5]
 // CHECK: dsb     #12                     // encoding: [0x9f,0x3c,0x03,0xd5]
 // CHECK: dsb     sy                      // encoding: [0x9f,0x3f,0x03,0xd5]
 // CHECK: dsb     oshld                   // encoding: [0x9f,0x31,0x03,0xd5]
Index: lib/Target/AArch64/AArch64InstrInfo.td
===================================================================
--- lib/Target/AArch64/AArch64InstrInfo.td
+++ lib/Target/AArch64/AArch64InstrInfo.td
@@ -645,6 +645,8 @@
 
 def : InstAlias<"clrex", (CLREX 0xf)>;
 def : InstAlias<"isb", (ISB 0xf)>;
+def : InstAlias<"ssbb", (DSB 0)>;
+def : InstAlias<"pssbb", (DSB 4)>;
 
 def MRS    : MRSI;
 def MSR    : MSRI;


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