[PATCH] D52109: [TwoAddressInstructionPass] Don't update SrcRegMap for copies inserted for tied register constraint when the src isn't killed

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 24 23:38:29 PDT 2018


craig.topper updated this revision to Diff 166816.
craig.topper added a comment.

Rebase


Repository:
  rL LLVM

https://reviews.llvm.org/D52109

Files:
  lib/CodeGen/TwoAddressInstructionPass.cpp
  test/CodeGen/X86/avx512-mask-op.ll
  test/CodeGen/X86/avx512-regcall-NoMask.ll
  test/CodeGen/X86/avx512-schedule.ll
  test/CodeGen/X86/avx512bw-mask-op.ll
  test/CodeGen/X86/avx512dq-mask-op.ll
  test/CodeGen/X86/bitreverse.ll
  test/CodeGen/X86/bswap_tree2.ll
  test/CodeGen/X86/bypass-slow-division-32.ll
  test/CodeGen/X86/combine-fcopysign.ll
  test/CodeGen/X86/combine-mul.ll
  test/CodeGen/X86/combine-sdiv.ll
  test/CodeGen/X86/combine-sra.ll
  test/CodeGen/X86/combine-srem.ll
  test/CodeGen/X86/combine-srl.ll
  test/CodeGen/X86/combine-udiv.ll
  test/CodeGen/X86/funnel-shift-rot.ll
  test/CodeGen/X86/funnel-shift.ll
  test/CodeGen/X86/haddsub-undef.ll
  test/CodeGen/X86/iabs.ll
  test/CodeGen/X86/imul.ll
  test/CodeGen/X86/mul-constant-i16.ll
  test/CodeGen/X86/mul-constant-i32.ll
  test/CodeGen/X86/mul-constant-i64.ll
  test/CodeGen/X86/paddus.ll
  test/CodeGen/X86/palignr.ll
  test/CodeGen/X86/pmul.ll
  test/CodeGen/X86/popcnt.ll
  test/CodeGen/X86/powi.ll
  test/CodeGen/X86/psubus.ll
  test/CodeGen/X86/rotate-extract.ll
  test/CodeGen/X86/sat-add.ll
  test/CodeGen/X86/sqrt-fastmath.ll
  test/CodeGen/X86/sse-minmax.ll
  test/CodeGen/X86/sse2-intrinsics-canonical.ll
  test/CodeGen/X86/sse2-schedule.ll
  test/CodeGen/X86/sse41-intrinsics-fast-isel.ll
  test/CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll
  test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
  test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
  test/CodeGen/X86/vec_ctbits.ll
  test/CodeGen/X86/vec_int_to_fp.ll
  test/CodeGen/X86/vec_minmax_sint.ll
  test/CodeGen/X86/vec_minmax_uint.ll
  test/CodeGen/X86/vec_sdiv_to_shift.ll
  test/CodeGen/X86/vec_shift6.ll
  test/CodeGen/X86/vector-bitreverse.ll
  test/CodeGen/X86/vector-idiv-sdiv-128.ll
  test/CodeGen/X86/vector-idiv-udiv-128.ll
  test/CodeGen/X86/vector-lzcnt-128.ll
  test/CodeGen/X86/vector-mul.ll
  test/CodeGen/X86/vector-popcnt-128.ll
  test/CodeGen/X86/vector-reduce-fadd-fast.ll
  test/CodeGen/X86/vector-reduce-fmul-fast.ll
  test/CodeGen/X86/vector-reduce-fmul.ll
  test/CodeGen/X86/vector-shift-ashr-128.ll
  test/CodeGen/X86/vector-shuffle-combining.ll
  test/CodeGen/X86/vselect-minmax.ll
  test/CodeGen/X86/x86-shifts.ll

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