[PATCH] D51231: [X86] Make Feature64Bit useful

[Anna Thomas via Phabricator via llvm-commits]

anna added a comment.

With this change, we now break the code gen in KVMs that do not have the "+64bit" feature tagged (although it is capable of generating 64 bit code). Is there a way to identify the feature for KVMs?

This is the cpuinfo for the KVM where code gen was failing with the Fatal Error: `64-bit code requested on a subtarget that doesn't support it!`

  cat /proc/cpuinfo:
  > processor       : 0
  > vendor_id       : AuthenticAMD
  > cpu family      : 6
  > model           : 13
  > model name      : QEMU Virtual CPU version 1.5.3
  > stepping        : 3
  > microcode       : 0x1000065
  > cpu MHz         : 2599.998
  > cache size      : 512 KB
  > physical id     : 0
  > siblings        : 1
  > core id         : 0
  > cpu cores       : 1
  > apicid          : 0
  > initial apicid  : 0
  > fpu             : yes
  > fpu_exception   : yes
  > cpuid level     : 4
  > wp              : yes
  > flags           : fpu de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall nx lm nopl pni cx16 hypervisor lahf_lm abm sse4a 3dnowprefetch vmmcall
  > bugs            : fxsave_leak sysret_ss_attrs
  > bogomips        : 5199.99
  > TLB size        : 1024 4K pages
  > cache_alignment : 64
  > address sizes   : 48 bits physical, 48 bits virtual
  > power management:


Repository:
  rL LLVM

https://reviews.llvm.org/D51231