[PATCH] D52221: require lower-switch in preISel passes for AMDGPU

Sameer Sahasrabuddhe via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 19 23:23:29 PDT 2018


sameerds added a comment.

In https://reviews.llvm.org/D52221#1238579, @sameerds wrote:

> In https://reviews.llvm.org/D52221#1238116, @nhaehnle wrote:
>
> > Good to hear the new DA can handle this. We need lowered switches for the control flow lowering anyway, though, so we may as well do it this way.
> >
> > The test case is extremely mysterious to me, though. What is it that's actually being tested here? From the description I understand it's the divergence of the phi in sw.epilog? I don't see how that relates to the CHECK lines.
>
>
> Updated the test to better convey the intention. Does that help? Note that since this change is a backend-specific workaround, the test focuses on the symptom seen in the results of si-annotate-control-flow rather than checking the results of divergence analysis.


@nhaehnle, is this good to go? Waiting for an LGTM ...


Repository:
  rL LLVM

https://reviews.llvm.org/D52221





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