[PATCH] D51983: [ARM] bottom-top mul support in ARMParallelDSP

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer accepted this revision.
SjoerdMeijer added inline comments.
This revision is now accepted and ready to land.


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Comment at: lib/Target/ARM/ARMParallelDSP.cpp:662
+
+  if (AreAliased(AA, Reads, Writes, Candidates))
+    return false;
----------------
I think the alias checks are the same as in MatchSMLAD, so it looks like we can share that, and avoid the duplication here. I could definitely live with that being done in a follow up patch.


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Comment at: test/CodeGen/ARM/paralleldsp-top-bottom.ll:28
+; CHECK: [[PIn1_2:%[^ ]+]] = ashr i32 [[PIn1_23_shl]], 16
+; CHECK: [[PIn1_3:%[^ ]+]] = ashr i32 [[PIn1_23]], 16
+
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These tests are not ideal, in the sense we are not directly checking for the smultb, smulbt, smultt patterns here. Instead, we rely on these ashr + mul patterns that we now generate, to be picked up and turned in to smlab variants later, like it is tested in test/CodeGen/ARM/smul.ll. And thus, since breaking these shr + mul rewrite patterns would give problems in smul.ll, I think these tests in their current form are acceptable as I understood that turning these tests in to llc tests would complicate things a bit.


https://reviews.llvm.org/D51983