[PATCH] D51932: [AMDGPU] Fix-up cases where writelane has 2 SGPR operands

[David Stuttard via Phabricator via llvm-commits]

dstuttard added inline comments.


================
Comment at: lib/Target/AMDGPU/SIFixSGPRCopies.cpp:457
+
+  for (MachineFunction::iterator BI = MF.begin(), BE = MF.end(); BI != BE;
+       ++BI) {
----------------
rampitec wrote:
> Why cannot you use loop in the runOnMachineFunction()?
I think we need all the sgpr to vgpr moves to have been completed before applying this fix since in some cases it might not be necessary.
I guess there's an argument for this to be done in a separate pass, or a later pass, then it could go into runOnMachineFunction - any suggestions?


================
Comment at: lib/Target/AMDGPU/SIFixSGPRCopies.cpp:482
+          bool Resolved = false;
+          std::vector<MachineOperand *> MOs{&Src0, &Src1};
+          for (auto MO : MOs) {
----------------
rampitec wrote:
> You do not need vector here.
> 
> ```
> for (auto MO : {&Src0, &Src1})
> ```
Good point, I'll make this one.


Repository:
  rL LLVM

https://reviews.llvm.org/D51932