[PATCH] D48580: [AArch64] Support reserving x1-7 registers.

[Tri Vo via Phabricator via llvm-commits]

trong updated this revision to Diff 164280.
trong marked an inline comment as done.
trong added a comment.

Added test cases to make sure that correct errors are emitted with fastisel, globalisel, and sdag isel for plain calls and runtime library calls like memcpy.


https://reviews.llvm.org/D48580

Files:
  lib/Target/AArch64/AArch64.td
  lib/Target/AArch64/AArch64CallLowering.cpp
  lib/Target/AArch64/AArch64FastISel.cpp
  lib/Target/AArch64/AArch64FrameLowering.cpp
  lib/Target/AArch64/AArch64ISelLowering.cpp
  lib/Target/AArch64/AArch64RegisterInfo.cpp
  lib/Target/AArch64/AArch64RegisterInfo.h
  lib/Target/AArch64/AArch64Subtarget.cpp
  lib/Target/AArch64/AArch64Subtarget.h
  test/CodeGen/AArch64/arm64-platform-reg.ll
  test/CodeGen/AArch64/arm64-reserved-arg-reg-call-error.ll

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