[PATCH] D51706: ARM64: improve non-zero memset isel by ~2x

JF Bastien via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 5 16:52:29 PDT 2018


jfb added inline comments.


================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:8350
   const Function &F = MF.getFunction();
-  if (Subtarget->hasFPARMv8() && !IsMemset && Size >= 16 &&
-      !F.hasFnAttribute(Attribute::NoImplicitFloat) &&
----------------
I'd like to point out how this line doesn't match the above comment:

> Don't use AdvSIMD to implement 16-byte memset.


Repository:
  rL LLVM

https://reviews.llvm.org/D51706





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