[PATCH] D48580: [AArch64] Support reserving x1-7 registers.

[Nick Desaulniers via Phabricator via llvm-commits]

nickdesaulniers added inline comments.


================
Comment at: lib/Target/AArch64/AArch64RegisterInfo.cpp:173-177
+  bool result = false;
+  for (auto reg : GPRArgRegs) {
+    result |= isReservedReg(MF, reg);
   }
+  return result;
----------------
std::any_of()


================
Comment at: lib/Target/AArch64/AArch64RegisterInfo.cpp:452-454
+    for (size_t i = 0; i < AArch64::GPR64commonRegClass.getNumRegs(); ++i) {
+      if (MF.getSubtarget<AArch64Subtarget>().isXRegisterReserved(i)) ++NumReserved;
+    }
----------------
std::count()


================
Comment at: lib/Target/AArch64/AArch64Subtarget.cpp:155
     : AArch64GenSubtargetInfo(TT, CPU, FS),
-      ReserveX18(AArch64::isX18ReservedByDefault(TT)), IsLittle(LittleEndian),
+      ReserveXRegister(31), IsLittle(LittleEndian),
       TargetTriple(TT), FrameLowering(),
----------------
Sorry, where does `31` come from here?


https://reviews.llvm.org/D48580