[PATCH] D51631: [ARM] Tighten f64<->f16 conversion requirements

Bernard Ogden via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 4 07:36:31 PDT 2018


bogden created this revision.
bogden added a reviewer: SjoerdMeijer.
Herald added a reviewer: javed.absar.
Herald added subscribers: llvm-commits, chrib, kristof.beyls.

Some uses of FullFP16Pat and FP16Pat were missing
needed Requires field.

It seems that in practice this never caused a problem.
There is no full FP16 supporting target that does not
support the relevant instructions, so FullFP16Pat did
not introduce any bug.

ARM v8-R does not support the relevant instructions if
it does not support single-precision. In this case the
FP16Pat can match when it should not, but this does
not matter because ARMISelLowering.cpp has an Extend
that effectively enforces the requirements.

AArch64 does not come into play because 8-R is the only
target where there can be a problem.


Repository:
  rL LLVM

https://reviews.llvm.org/D51631

Files:
  lib/Target/ARM/ARMInstrVFP.td
  test/CodeGen/ARM/fpconv.ll
  test/CodeGen/ARM/half.ll

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