[PATCH] D51479: [AArch64] Implement aarch64_vector_pcs codegen support.

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 4 02:46:03 PDT 2018


sdesmalen updated this revision to Diff 163767.
sdesmalen added a comment.

- Calculate CSStackSize by accumulating reg-size for each saved register.
- Only sets PairedReg in SavedRegs when it is not AArch64::NoRegister.
- Removed trailing whitespace from test.


https://reviews.llvm.org/D51479

Files:
  lib/Target/AArch64/AArch64CallingConvention.td
  lib/Target/AArch64/AArch64FrameLowering.cpp
  lib/Target/AArch64/AArch64RegisterInfo.cpp
  test/CodeGen/AArch64/aarch64-vector-pcs.mir

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