[PATCH] D51553: [DAGCombiner][x86] add transform/hook to load a scalar directly for use in a vector binop

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: efriedma, craig.topper, RKSimon, lebedev.ri.
Herald added a subscriber: mcrosier.

This is the reversal for the proposed IR canonicalization in https://reviews.llvm.org/D50992 (insert+vector op --> scalar op+insert).

I've enabled x86 in the minimal way because this looks like a close call for most recent Intel. They have fast (1uop / 1 cycle latency) transfer from GPR to *MM according to Agner / llvm-mca. And the current AVX2 code is likely too broadcast-happy as seen in the test diffs.

So this doesn't exercise the recent broadcast improvements from https://reviews.llvm.org/D51125 / https://reviews.llvm.org/D51186 yet.

Enabling more opcodes/types (the test file covers all 18 IR-equivalent binops) looks tricky. For example, we should have gotten the 'and' with i32 test, but v4i32 is promoted to v2i64. Pre-SSE4, we don't want have pmulld, so we can't uniformly allow isLegalOrCustom().


https://reviews.llvm.org/D51553

Files:
  include/llvm/CodeGen/TargetLowering.h
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86ISelLowering.h
  test/CodeGen/X86/load-scalar-as-vector.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D51553.163575.patch
Type: text/x-patch
Size: 10194 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180831/c72c543e/attachment.bin>