[llvm] r341193 - [GlobalIsel][X86] Support for G_FCMP
Alexander Ivchenko via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 31 02:38:28 PDT 2018
Author: aivchenk
Date: Fri Aug 31 02:38:27 2018
New Revision: 341193
URL: http://llvm.org/viewvc/llvm-project?rev=341193&view=rev
Log:
[GlobalIsel][X86] Support for G_FCMP
Differential Revision: https://reviews.llvm.org/D49172
Added:
llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-fcmp.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir
Modified:
llvm/trunk/lib/Target/X86/X86InstructionSelector.cpp
llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp
llvm/trunk/lib/Target/X86/X86RegisterBankInfo.cpp
llvm/trunk/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir
Modified: llvm/trunk/lib/Target/X86/X86InstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstructionSelector.cpp?rev=341193&r1=341192&r2=341193&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstructionSelector.cpp Fri Aug 31 02:38:27 2018
@@ -89,6 +89,8 @@ private:
MachineFunction &MF) const;
bool selectCmp(MachineInstr &I, MachineRegisterInfo &MRI,
MachineFunction &MF) const;
+ bool selectFCmp(MachineInstr &I, MachineRegisterInfo &MRI,
+ MachineFunction &MF) const;
bool selectUadde(MachineInstr &I, MachineRegisterInfo &MRI,
MachineFunction &MF) const;
bool selectCopy(MachineInstr &I, MachineRegisterInfo &MRI) const;
@@ -362,6 +364,8 @@ bool X86InstructionSelector::select(Mach
return selectAnyext(I, MRI, MF);
case TargetOpcode::G_ICMP:
return selectCmp(I, MRI, MF);
+ case TargetOpcode::G_FCMP:
+ return selectFCmp(I, MRI, MF);
case TargetOpcode::G_UADDE:
return selectUadde(I, MRI, MF);
case TargetOpcode::G_UNMERGE_VALUES:
@@ -966,6 +970,98 @@ bool X86InstructionSelector::selectCmp(M
I.eraseFromParent();
return true;
}
+
+bool X86InstructionSelector::selectFCmp(MachineInstr &I,
+ MachineRegisterInfo &MRI,
+ MachineFunction &MF) const {
+ assert((I.getOpcode() == TargetOpcode::G_FCMP) && "unexpected instruction");
+
+ unsigned LhsReg = I.getOperand(2).getReg();
+ unsigned RhsReg = I.getOperand(3).getReg();
+ CmpInst::Predicate Predicate =
+ (CmpInst::Predicate)I.getOperand(1).getPredicate();
+
+ // FCMP_OEQ and FCMP_UNE cannot be checked with a single instruction.
+ static const uint16_t SETFOpcTable[2][3] = {
+ {X86::SETEr, X86::SETNPr, X86::AND8rr},
+ {X86::SETNEr, X86::SETPr, X86::OR8rr}};
+ const uint16_t *SETFOpc = nullptr;
+ switch (Predicate) {
+ default:
+ break;
+ case CmpInst::FCMP_OEQ:
+ SETFOpc = &SETFOpcTable[0][0];
+ break;
+ case CmpInst::FCMP_UNE:
+ SETFOpc = &SETFOpcTable[1][0];
+ break;
+ }
+
+ // Compute the opcode for the CMP instruction.
+ unsigned OpCmp;
+ LLT Ty = MRI.getType(LhsReg);
+ switch (Ty.getSizeInBits()) {
+ default:
+ return false;
+ case 32:
+ OpCmp = X86::UCOMISSrr;
+ break;
+ case 64:
+ OpCmp = X86::UCOMISDrr;
+ break;
+ }
+
+ unsigned ResultReg = I.getOperand(0).getReg();
+ RBI.constrainGenericRegister(
+ ResultReg,
+ *getRegClass(LLT::scalar(8), *RBI.getRegBank(ResultReg, MRI, TRI)), MRI);
+ if (SETFOpc) {
+ MachineInstr &CmpInst =
+ *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(OpCmp))
+ .addReg(LhsReg)
+ .addReg(RhsReg);
+
+ unsigned FlagReg1 = MRI.createVirtualRegister(&X86::GR8RegClass);
+ unsigned FlagReg2 = MRI.createVirtualRegister(&X86::GR8RegClass);
+ MachineInstr &Set1 = *BuildMI(*I.getParent(), I, I.getDebugLoc(),
+ TII.get(SETFOpc[0]), FlagReg1);
+ MachineInstr &Set2 = *BuildMI(*I.getParent(), I, I.getDebugLoc(),
+ TII.get(SETFOpc[1]), FlagReg2);
+ MachineInstr &Set3 = *BuildMI(*I.getParent(), I, I.getDebugLoc(),
+ TII.get(SETFOpc[2]), ResultReg)
+ .addReg(FlagReg1)
+ .addReg(FlagReg2);
+ constrainSelectedInstRegOperands(CmpInst, TII, TRI, RBI);
+ constrainSelectedInstRegOperands(Set1, TII, TRI, RBI);
+ constrainSelectedInstRegOperands(Set2, TII, TRI, RBI);
+ constrainSelectedInstRegOperands(Set3, TII, TRI, RBI);
+
+ I.eraseFromParent();
+ return true;
+ }
+
+ X86::CondCode CC;
+ bool SwapArgs;
+ std::tie(CC, SwapArgs) = X86::getX86ConditionCode(Predicate);
+ assert(CC <= X86::LAST_VALID_COND && "Unexpected condition code.");
+ unsigned Opc = X86::getSETFromCond(CC);
+
+ if (SwapArgs)
+ std::swap(LhsReg, RhsReg);
+
+ // Emit a compare of LHS/RHS.
+ MachineInstr &CmpInst =
+ *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(OpCmp))
+ .addReg(LhsReg)
+ .addReg(RhsReg);
+
+ MachineInstr &Set =
+ *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Opc), ResultReg);
+ constrainSelectedInstRegOperands(CmpInst, TII, TRI, RBI);
+ constrainSelectedInstRegOperands(Set, TII, TRI, RBI);
+ I.eraseFromParent();
+ return true;
+}
bool X86InstructionSelector::selectUadde(MachineInstr &I,
MachineRegisterInfo &MRI,
Modified: llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp?rev=341193&r1=341192&r2=341193&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp Fri Aug 31 02:38:27 2018
@@ -222,6 +222,12 @@ void X86LegalizerInfo::setLegalizerInfo6
// Comparison
setAction({G_ICMP, 1, s64}, Legal);
+ getActionDefinitionsBuilder(G_FCMP)
+ .legalForCartesianProduct({s8}, {s32, s64})
+ .clampScalar(0, s8, s8)
+ .clampScalar(1, s32, s64)
+ .widenScalarToNextPow2(1);
+
// Shifts and SDIV
getActionDefinitionsBuilder({G_SHL, G_LSHR, G_ASHR, G_SDIV})
.legalFor({s8, s16, s32, s64})
Modified: llvm/trunk/lib/Target/X86/X86RegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterBankInfo.cpp?rev=341193&r1=341192&r2=341193&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterBankInfo.cpp Fri Aug 31 02:38:27 2018
@@ -209,6 +209,21 @@ X86RegisterBankInfo::getInstrMapping(con
OpRegBankIdx[1] = getPartialMappingIdx(Ty1, /* isFP */ false);
break;
}
+ case TargetOpcode::G_FCMP: {
+ LLT Ty1 = MRI.getType(MI.getOperand(2).getReg());
+ LLT Ty2 = MRI.getType(MI.getOperand(3).getReg());
+ (void)Ty2;
+ assert(Ty1.getSizeInBits() == Ty2.getSizeInBits() &&
+ "Mismatched operand sizes for G_FCMP");
+
+ unsigned Size = Ty1.getSizeInBits();
+ assert((Size == 32 || Size == 64) && "Unsupported size for G_FCMP");
+
+ auto FpRegBank = getPartialMappingIdx(Ty1, /* isFP */ true);
+ OpRegBankIdx = {PMI_GPR8,
+ /* Predicate */ PMI_None, FpRegBank, FpRegBank};
+ break;
+ }
case TargetOpcode::G_TRUNC:
case TargetOpcode::G_ANYEXT: {
auto &Op0 = MI.getOperand(0);
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir?rev=341193&r1=341192&r2=341193&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir Fri Aug 31 02:38:27 2018
@@ -266,6 +266,146 @@
ret double %conv
}
+ define i1 @fcmp_float_oeq(float %x, float %y) {
+ %1 = fcmp oeq float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ogt(float %x, float %y) {
+ %1 = fcmp ogt float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_oge(float %x, float %y) {
+ %1 = fcmp oge float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_olt(float %x, float %y) {
+ %1 = fcmp olt float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ole(float %x, float %y) {
+ %1 = fcmp ole float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_one(float %x, float %y) {
+ %1 = fcmp one float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ord(float %x, float %y) {
+ %1 = fcmp ord float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_uno(float %x, float %y) {
+ %1 = fcmp uno float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ueq(float %x, float %y) {
+ %1 = fcmp ueq float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ugt(float %x, float %y) {
+ %1 = fcmp ugt float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_uge(float %x, float %y) {
+ %1 = fcmp uge float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ult(float %x, float %y) {
+ %1 = fcmp ult float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ule(float %x, float %y) {
+ %1 = fcmp ule float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_une(float %x, float %y) {
+ %1 = fcmp une float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_oeq(double %x, double %y) {
+ %1 = fcmp oeq double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ogt(double %x, double %y) {
+ %1 = fcmp ogt double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_oge(double %x, double %y) {
+ %1 = fcmp oge double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_olt(double %x, double %y) {
+ %1 = fcmp olt double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ole(double %x, double %y) {
+ %1 = fcmp ole double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_one(double %x, double %y) {
+ %1 = fcmp one double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ord(double %x, double %y) {
+ %1 = fcmp ord double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_uno(double %x, double %y) {
+ %1 = fcmp uno double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ueq(double %x, double %y) {
+ %1 = fcmp ueq double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ugt(double %x, double %y) {
+ %1 = fcmp ugt double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_uge(double %x, double %y) {
+ %1 = fcmp uge double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ult(double %x, double %y) {
+ %1 = fcmp ult double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ule(double %x, double %y) {
+ %1 = fcmp ule double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_une(double %x, double %y) {
+ %1 = fcmp une double %x, %y
+ ret i1 %1
+ }
+
...
---
name: test_add_i8
@@ -1979,3 +2119,1319 @@ body: |
RET 0, implicit $xmm0
...
+---
+name: fcmp_float_oeq
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_oeq
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(oeq), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_oeq
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(oeq), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(oeq), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ogt
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_ogt
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ogt), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_ogt
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ogt), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ogt), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_oge
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_oge
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(oge), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_oge
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(oge), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(oge), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_olt
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_olt
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(olt), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_olt
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(olt), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(olt), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ole
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_ole
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ole), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_ole
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ole), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ole), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_one
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_one
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(one), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_one
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(one), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(one), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ord
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_ord
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ord), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_ord
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ord), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ord), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_uno
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_uno
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(uno), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_uno
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(uno), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(uno), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ueq
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_ueq
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ueq), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_ueq
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ueq), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ueq), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ugt
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_ugt
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ugt), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_ugt
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ugt), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ugt), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_uge
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_uge
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(uge), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_uge
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(uge), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(uge), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ult
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_ult
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ult), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_ult
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ult), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ult), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ule
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_ule
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ule), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_ule
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ule), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ule), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_une
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_float_une
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(une), [[TRUNC]](s32), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_float_une
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(une), [[TRUNC]](s32), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(une), %0(s32), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_oeq
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_oeq
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(oeq), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_oeq
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(oeq), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(oeq), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ogt
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_ogt
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ogt), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_ogt
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ogt), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ogt), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_oge
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_oge
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(oge), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_oge
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(oge), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(oge), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_olt
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_olt
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(olt), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_olt
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(olt), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(olt), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ole
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_ole
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ole), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_ole
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ole), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ole), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_one
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_one
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(one), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_one
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(one), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(one), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ord
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_ord
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ord), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_ord
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ord), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ord), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_uno
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_uno
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(uno), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_uno
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(uno), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(uno), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ueq
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_ueq
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ueq), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_ueq
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ueq), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ueq), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ugt
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_ugt
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ugt), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_ugt
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ugt), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ugt), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_uge
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_uge
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(uge), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_uge
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(uge), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(uge), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ult
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_ult
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ult), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_ult
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ult), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ult), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ule
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_ule
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ule), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_ule
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(ule), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(ule), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_une
+alignment: 4
+legalized: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; FAST-LABEL: name: fcmp_double_une
+ ; FAST: liveins: $xmm0, $xmm1
+ ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; FAST: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; FAST: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; FAST: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(une), [[TRUNC]](s64), [[TRUNC1]]
+ ; FAST: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; FAST: $al = COPY [[COPY2]](s8)
+ ; FAST: RET 0, implicit $al
+ ; GREEDY-LABEL: name: fcmp_double_une
+ ; GREEDY: liveins: $xmm0, $xmm1
+ ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+ ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+ ; GREEDY: [[COPY1:%[0-9]+]]:vecr(s128) = COPY $xmm1
+ ; GREEDY: [[TRUNC1:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY1]](s128)
+ ; GREEDY: [[FCMP:%[0-9]+]]:gpr(s8) = G_FCMP floatpred(une), [[TRUNC]](s64), [[TRUNC1]]
+ ; GREEDY: [[COPY2:%[0-9]+]]:gpr(s8) = COPY [[FCMP]](s8)
+ ; GREEDY: $al = COPY [[COPY2]](s8)
+ ; GREEDY: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %6:_(s8) = G_FCMP floatpred(une), %0(s64), %1
+ %5:_(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
Added: llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-fcmp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-fcmp.mir?rev=341193&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-fcmp.mir (added)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-fcmp.mir Fri Aug 31 02:38:27 2018
@@ -0,0 +1,1126 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
+
+--- |
+
+ define i1 @fcmp_float_oeq(float %x, float %y) {
+ %1 = fcmp oeq float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ogt(float %x, float %y) {
+ %1 = fcmp ogt float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_oge(float %x, float %y) {
+ %1 = fcmp oge float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_olt(float %x, float %y) {
+ %1 = fcmp olt float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ole(float %x, float %y) {
+ %1 = fcmp ole float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_one(float %x, float %y) {
+ %1 = fcmp one float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ord(float %x, float %y) {
+ %1 = fcmp ord float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_uno(float %x, float %y) {
+ %1 = fcmp uno float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ueq(float %x, float %y) {
+ %1 = fcmp ueq float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ugt(float %x, float %y) {
+ %1 = fcmp ugt float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_uge(float %x, float %y) {
+ %1 = fcmp uge float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ult(float %x, float %y) {
+ %1 = fcmp ult float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ule(float %x, float %y) {
+ %1 = fcmp ule float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_une(float %x, float %y) {
+ %1 = fcmp une float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_oeq(double %x, double %y) {
+ %1 = fcmp oeq double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ogt(double %x, double %y) {
+ %1 = fcmp ogt double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_oge(double %x, double %y) {
+ %1 = fcmp oge double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_olt(double %x, double %y) {
+ %1 = fcmp olt double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ole(double %x, double %y) {
+ %1 = fcmp ole double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_one(double %x, double %y) {
+ %1 = fcmp one double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ord(double %x, double %y) {
+ %1 = fcmp ord double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_uno(double %x, double %y) {
+ %1 = fcmp uno double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ueq(double %x, double %y) {
+ %1 = fcmp ueq double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ugt(double %x, double %y) {
+ %1 = fcmp ugt double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_uge(double %x, double %y) {
+ %1 = fcmp uge double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ult(double %x, double %y) {
+ %1 = fcmp ult double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ule(double %x, double %y) {
+ %1 = fcmp ule double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_une(double %x, double %y) {
+ %1 = fcmp une double %x, %y
+ ret i1 %1
+ }
+
+...
+---
+name: fcmp_float_oeq
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_oeq
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(oeq), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(oeq), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ogt
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ogt
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ogt), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ogt), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_oge
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_oge
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(oge), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(oge), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_olt
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_olt
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(olt), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(olt), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ole
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ole
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ole), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ole), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_one
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_one
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(one), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(one), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ord
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ord
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ord), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ord), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_uno
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_uno
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(uno), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(uno), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ueq
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ueq
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ueq), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ueq), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ugt
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ugt
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ugt), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ugt), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_uge
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_uge
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(uge), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(uge), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ult
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ult
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ult), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ult), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ule
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ule
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ule), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ule), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_une
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_une
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(une), [[TRUNC]](s32), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s32) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s32) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(une), %0(s32), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_oeq
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_oeq
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(oeq), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(oeq), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ogt
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ogt
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ogt), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ogt), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_oge
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_oge
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(oge), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(oge), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_olt
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_olt
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(olt), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(olt), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ole
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ole
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ole), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ole), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_one
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_one
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(one), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(one), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ord
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ord
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ord), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ord), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_uno
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_uno
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(uno), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(uno), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ueq
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ueq
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ueq), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ueq), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ugt
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ugt
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ugt), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ugt), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_uge
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_uge
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(uge), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(uge), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ult
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ult
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ult), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ult), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ule
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ule
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(ule), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(ule), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_une
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_une
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
+ ; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
+ ; CHECK: [[FCMP:%[0-9]+]]:_(s8) = G_FCMP floatpred(une), [[TRUNC]](s64), [[TRUNC1]]
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[FCMP]](s8)
+ ; CHECK: $al = COPY [[COPY2]](s8)
+ ; CHECK: RET 0, implicit $al
+ %2:_(s128) = COPY $xmm0
+ %0:_(s64) = G_TRUNC %2(s128)
+ %3:_(s128) = COPY $xmm1
+ %1:_(s64) = G_TRUNC %3(s128)
+ %4:_(s1) = G_FCMP floatpred(une), %0(s64), %1
+ %5:_(s8) = G_ANYEXT %4(s1)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
Added: llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir?rev=341193&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir (added)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir Fri Aug 31 02:38:27 2018
@@ -0,0 +1,1218 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
+
+--- |
+
+ define i1 @fcmp_float_oeq(float %x, float %y) {
+ %1 = fcmp oeq float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ogt(float %x, float %y) {
+ %1 = fcmp ogt float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_oge(float %x, float %y) {
+ %1 = fcmp oge float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_olt(float %x, float %y) {
+ %1 = fcmp olt float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ole(float %x, float %y) {
+ %1 = fcmp ole float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_one(float %x, float %y) {
+ %1 = fcmp one float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ord(float %x, float %y) {
+ %1 = fcmp ord float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_uno(float %x, float %y) {
+ %1 = fcmp uno float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ueq(float %x, float %y) {
+ %1 = fcmp ueq float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ugt(float %x, float %y) {
+ %1 = fcmp ugt float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_uge(float %x, float %y) {
+ %1 = fcmp uge float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ult(float %x, float %y) {
+ %1 = fcmp ult float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_ule(float %x, float %y) {
+ %1 = fcmp ule float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_float_une(float %x, float %y) {
+ %1 = fcmp une float %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_oeq(double %x, double %y) {
+ %1 = fcmp oeq double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ogt(double %x, double %y) {
+ %1 = fcmp ogt double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_oge(double %x, double %y) {
+ %1 = fcmp oge double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_olt(double %x, double %y) {
+ %1 = fcmp olt double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ole(double %x, double %y) {
+ %1 = fcmp ole double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_one(double %x, double %y) {
+ %1 = fcmp one double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ord(double %x, double %y) {
+ %1 = fcmp ord double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_uno(double %x, double %y) {
+ %1 = fcmp uno double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ueq(double %x, double %y) {
+ %1 = fcmp ueq double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ugt(double %x, double %y) {
+ %1 = fcmp ugt double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_uge(double %x, double %y) {
+ %1 = fcmp uge double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ult(double %x, double %y) {
+ %1 = fcmp ult double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_ule(double %x, double %y) {
+ %1 = fcmp ule double %x, %y
+ ret i1 %1
+ }
+
+ define i1 @fcmp_double_une(double %x, double %y) {
+ %1 = fcmp une double %x, %y
+ ret i1 %1
+ }
+
+...
+---
+name: fcmp_float_oeq
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_oeq
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETEr:%[0-9]+]]:gr8 = SETEr implicit $eflags
+ ; CHECK: [[SETNPr:%[0-9]+]]:gr8 = SETNPr implicit $eflags
+ ; CHECK: [[AND8rr:%[0-9]+]]:gr8 = AND8rr [[SETEr]], [[SETNPr]], implicit-def $eflags
+ ; CHECK: $al = COPY [[AND8rr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(oeq), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ogt
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ogt
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
+ ; CHECK: $al = COPY [[SETAr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ogt), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_oge
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_oge
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETAEr:%[0-9]+]]:gr8 = SETAEr implicit $eflags
+ ; CHECK: $al = COPY [[SETAEr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(oge), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_olt
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_olt
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags
+ ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
+ ; CHECK: $al = COPY [[SETAr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(olt), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ole
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ole
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags
+ ; CHECK: [[SETAEr:%[0-9]+]]:gr8 = SETAEr implicit $eflags
+ ; CHECK: $al = COPY [[SETAEr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ole), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_one
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_one
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETNEr:%[0-9]+]]:gr8 = SETNEr implicit $eflags
+ ; CHECK: $al = COPY [[SETNEr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(one), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ord
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ord
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETNPr:%[0-9]+]]:gr8 = SETNPr implicit $eflags
+ ; CHECK: $al = COPY [[SETNPr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ord), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_uno
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_uno
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETPr:%[0-9]+]]:gr8 = SETPr implicit $eflags
+ ; CHECK: $al = COPY [[SETPr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(uno), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ueq
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ueq
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETEr:%[0-9]+]]:gr8 = SETEr implicit $eflags
+ ; CHECK: $al = COPY [[SETEr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ueq), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ugt
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ugt
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags
+ ; CHECK: [[SETBr:%[0-9]+]]:gr8 = SETBr implicit $eflags
+ ; CHECK: $al = COPY [[SETBr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ugt), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_uge
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_uge
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags
+ ; CHECK: [[SETBEr:%[0-9]+]]:gr8 = SETBEr implicit $eflags
+ ; CHECK: $al = COPY [[SETBEr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(uge), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ult
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ult
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETBr:%[0-9]+]]:gr8 = SETBr implicit $eflags
+ ; CHECK: $al = COPY [[SETBr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ult), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_ule
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_ule
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETBEr:%[0-9]+]]:gr8 = SETBEr implicit $eflags
+ ; CHECK: $al = COPY [[SETBEr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ule), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_float_une
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_float_une
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
+ ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETNEr:%[0-9]+]]:gr8 = SETNEr implicit $eflags
+ ; CHECK: [[SETPr:%[0-9]+]]:gr8 = SETPr implicit $eflags
+ ; CHECK: [[OR8rr:%[0-9]+]]:gr8 = OR8rr [[SETNEr]], [[SETPr]], implicit-def $eflags
+ ; CHECK: $al = COPY [[OR8rr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s32) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s32) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(une), %0(s32), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_oeq
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_oeq
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETEr:%[0-9]+]]:gr8 = SETEr implicit $eflags
+ ; CHECK: [[SETNPr:%[0-9]+]]:gr8 = SETNPr implicit $eflags
+ ; CHECK: [[AND8rr:%[0-9]+]]:gr8 = AND8rr [[SETEr]], [[SETNPr]], implicit-def $eflags
+ ; CHECK: $al = COPY [[AND8rr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(oeq), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ogt
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ogt
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
+ ; CHECK: $al = COPY [[SETAr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ogt), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_oge
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_oge
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETAEr:%[0-9]+]]:gr8 = SETAEr implicit $eflags
+ ; CHECK: $al = COPY [[SETAEr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(oge), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_olt
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_olt
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags
+ ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
+ ; CHECK: $al = COPY [[SETAr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(olt), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ole
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ole
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags
+ ; CHECK: [[SETAEr:%[0-9]+]]:gr8 = SETAEr implicit $eflags
+ ; CHECK: $al = COPY [[SETAEr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ole), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_one
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_one
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETNEr:%[0-9]+]]:gr8 = SETNEr implicit $eflags
+ ; CHECK: $al = COPY [[SETNEr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(one), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ord
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ord
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETNPr:%[0-9]+]]:gr8 = SETNPr implicit $eflags
+ ; CHECK: $al = COPY [[SETNPr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ord), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_uno
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_uno
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETPr:%[0-9]+]]:gr8 = SETPr implicit $eflags
+ ; CHECK: $al = COPY [[SETPr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(uno), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ueq
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ueq
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETEr:%[0-9]+]]:gr8 = SETEr implicit $eflags
+ ; CHECK: $al = COPY [[SETEr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ueq), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ugt
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ugt
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags
+ ; CHECK: [[SETBr:%[0-9]+]]:gr8 = SETBr implicit $eflags
+ ; CHECK: $al = COPY [[SETBr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ugt), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_uge
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_uge
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags
+ ; CHECK: [[SETBEr:%[0-9]+]]:gr8 = SETBEr implicit $eflags
+ ; CHECK: $al = COPY [[SETBEr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(uge), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ult
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ult
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETBr:%[0-9]+]]:gr8 = SETBr implicit $eflags
+ ; CHECK: $al = COPY [[SETBr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ult), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_ule
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_ule
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETBEr:%[0-9]+]]:gr8 = SETBEr implicit $eflags
+ ; CHECK: $al = COPY [[SETBEr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(ule), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
+---
+name: fcmp_double_une
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vecr }
+ - { id: 1, class: vecr }
+ - { id: 2, class: vecr }
+ - { id: 3, class: vecr }
+ - { id: 4, class: _ }
+ - { id: 5, class: gpr }
+ - { id: 6, class: gpr }
+body: |
+ bb.1 (%ir-block.0):
+ liveins: $xmm0, $xmm1
+
+ ; CHECK-LABEL: name: fcmp_double_une
+ ; CHECK: liveins: $xmm0, $xmm1
+ ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
+ ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
+ ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
+ ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
+ ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
+ ; CHECK: [[SETNEr:%[0-9]+]]:gr8 = SETNEr implicit $eflags
+ ; CHECK: [[SETPr:%[0-9]+]]:gr8 = SETPr implicit $eflags
+ ; CHECK: [[OR8rr:%[0-9]+]]:gr8 = OR8rr [[SETNEr]], [[SETPr]], implicit-def $eflags
+ ; CHECK: $al = COPY [[OR8rr]]
+ ; CHECK: RET 0, implicit $al
+ %2:vecr(s128) = COPY $xmm0
+ %0:vecr(s64) = G_TRUNC %2(s128)
+ %3:vecr(s128) = COPY $xmm1
+ %1:vecr(s64) = G_TRUNC %3(s128)
+ %6:gpr(s8) = G_FCMP floatpred(une), %0(s64), %1
+ %5:gpr(s8) = COPY %6(s8)
+ $al = COPY %5(s8)
+ RET 0, implicit $al
+
+...
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