[PATCH] D51482: [mips] Fix `mtc1` and `mfc1` definitions for microMIPS R6

Simon Atanasyan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 30 03:30:38 PDT 2018


atanasyan created this revision.
atanasyan added reviewers: abeserminji, petarj, smaksimovic.
Herald added subscribers: jrtc27, arichardson, sdardis.

The `mtc1` and `mfc1` definitions in the MipsInstrFPU.td have MMRel, but do not have StdMMR6Rel tags. When these instructions are emitted for microMIPS https://reviews.llvm.org/source/compiler-rt/ targets, `Mips::MipsR62MicroMipsR6` nor `Mips::Std2MicroMipsR6` cannot find correct op-codes and as a result the backend uses mips32 variant of the instructions encoding.

The patch fixes this problem by adding the StdMMR6Rel tag and check instructions encoding in the test case.


Repository:
  rL LLVM

https://reviews.llvm.org/D51482

Files:
  lib/Target/Mips/MicroMips32r6InstrInfo.td
  lib/Target/Mips/MipsInstrFPU.td
  test/CodeGen/Mips/micromips-mtc-mfc.ll

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