[PATCH] D51203: AMDGPU: Handle 32-bit address wraparounds for SMRD opcodes

[Marek Olšák via Phabricator via llvm-commits]

mareko added a comment.

@arsenm Where do you have the patches that preserve NUW?

In https://reviews.llvm.org/D51203#1214382, @nhaehnle wrote:

> Looking at SelectionDAGBuilder::visitGetElementPtr, nuw is set under certain conditions for `inbounds` getelementptr. I suspect we should be able to make most GEPs inbounds in Mesa - it just means that we never, not even temporarily, try to take addresses outside of properly allocated memory objects (buffers, arrays of descriptors).
>
> Would the combination of:
>
> - check NUW here
> - create inbounds GEP make good use of SMEM/SMRD immediates?


The code in SelectionDAGBuilder::visitGetElementPtr is unsafe for our case, because it doesn't know that the addition of 32-bit addresses is performed in 64 bits. Even x+4 can overflow in 32 bits but not 64 bits. The GEP can be "inbounds", but it doesn't change anything. However, we can hackishly use the inbounds flag to mean that the addition is safe, because GEP with inbounds and offset <= INT_MAX is converted to "add nuw".


Repository:
  rL LLVM

https://reviews.llvm.org/D51203